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T410 датащи(PDF) 20 Page - STMicroelectronics

номер детали T410
подробное описание детали  8-BIT INTELLIGENT CONTROLLER UNIT ICU Three Timer/PWMs, ADC, WDG
PDF  84 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
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T410 датащи(HTML) 20 Page - STMicroelectronics

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(*) ST52x420 only
2.3.4 Output Registers.
The Output Registers (OR) consist of 9 registers
containing data for the microcontroller peripherals
including the I/O Ports.
All registers can be specified by using a decimal
address (for example, 1 identifies the second OR).
By using LOAD instructions the Output Registers
(OR) may be set by using values stored in the
Program Memory (LDPE) or in RAM (LDPR)
The assembler instruction:
LDPR OR_i RAM_Reg.
loads the value of the RAM location identified by
theaddress RAM_Reginthe OR i-th Table2.4
describes OR.
In order to simplify the concept, a mnemonic name
is assigned to OR. The same names are used in
VISUALFIVETM 5.0 development tools.
Use and meaning of each register will be described
in further details in the corresponding section.
REG_CONF 5
PWM/TIMER 0
PWM/Timer 0 Working mode
Configuration
REG_CONF 6
PWM/TIMER 0
PWM/TIMER 0 Prescaler
configuration and output waveform
selection.
REG_CONF 7
PWM/TIMER 0
PWM/TIMER 0 Working Mode
Configuration
REG_CONF 8
PWM/TIMER 1
PWM/TIMER 1 Working Mode
Configuration
REG_CONF 9
PWM/TIMER 1
PWM/TIMER 1 Prescaler
configuration and output waveform
selection.
REG_CONF 10
PWM/TIMER 2
PWM/TIMER 2 Working Mode
Configuration
REG_CONF 11
PWM/TIMER 2
PWM/Timer 2 Prescaler
configuration and output waveform
selection.
REG_CONF 12
PORT A
Set the bit 0,1 and 2 like Digital I/O
or complementary Timers Output.
REG_CONF 13
PORT B
Set the relative bit like digital input
or digital output.
REG_CONF 14
PORT B
Set the relative I/O like Digital or
Analog (*).
REG_CONF 15
PORT C
Set the relative I/O like digital input
or digital output
REG_CONF 16
PORT C
Set the relative I/O like Digital I/O
or Timers Output
Table 2.3 Configuration Registers (continued)
CONFIGURATION REGISTER
PERIPHERAL
DESCRIPTION



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