ST20-GP1 datasheet(70/116 Pages) STMICROELECTRONICS

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12 Serial link interface (OS-Link)

The OS-Link based serial communications subsystem provides serial data transfer. Its main

function is for booting the device during software development.

The OS-Link is a serial communications engine consisting of two signal wires, one in each

direction. OS-Links use an asynchronous bit-serial (byte-stream) protocol, each bit received is

sampled ﬁve times, hence the term

over-sampled links (OS-Links). The OS-Link provides a pair of

channels, one input and one output channel.

The OS-Link is used for the following purposes:

•

Bootstrapping — the program which is executed at power up or after reset can reside in

ROM in the address space, or can be loaded via the OS-Link directly into memory.

•

Diagnostics — diagnostic and debug software can be downloaded over the link connected

to a PC or other diagnostic equipment, and the system performance and functionality can

be monitored.

•

Communicating with OS-Link peripherals or other ST20 devices.

12.1 OS-Link protocol

The quiescent state of a link output is low. Each data byte is transmitted as a high start bit followed

by a one bit followed by eight data bits followed by a low stop bit (see Figure 12.1). The least

signiﬁcant bit of data is transmitted ﬁrst. After transmitting a data byte the sender waits for the

acknowledge, which consists of a high start bit followed by a zero bit. The acknowledge signiﬁes

both that a process was able to receive the acknowledged data byte and that the receiving link is

able to receive another byte. The sending link reschedules the sending process only after the

acknowledge for the ﬁnal byte of the message has been received. The link allows an acknowledge

to be sent before the data has been fully received.

Figure 12.1 OS-Link data and acknowledge formats

12.2 OS-Link speed

The OS-Link data rate is 19.6416 Mbits/s. This rate is the result of basing the clock on the

GPS-speciﬁc 16.368 MHz input. Standard 20 MHz development systems are not within

speciﬁcation, but operate correctly under benign conditions. To operate within spec, the reference

clock for 5 MHz (B008, C011, C012) systems should be changed to 4.9104 MHz, for 10 MHz to

9.8208 MHz.

Data

Ack

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