M58LW032D datasheet(16/50 Pages) STMICROELECTRONICS

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M58LW032D

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the Program/Erase Controller. Once the command

is issued subsequent Bus Read operations read

the Status Register. See the section on the Status

During the Block Protect operation the memory will

only accept the Read Status Register command.

All other commands will be ignored. Typical Block

Protection times are given in Table 9.

The Block Protection bits are non-volatile, once

set they remain set through reset and power-

down/power-up. They are cleared by a Blocks Un-

protect command.

See APPENDIX C., Figure 20., Block Protect

Flowchart and Pseudo Code, for a suggested flow-

chart on using the Block Protect command.

Blocks Unprotect Command. The Blocks Un-

protect command is used to unprotect all of the

blocks. Two Bus Write cycles are required to issue

the Blocks Unprotect command; the second Bus

Write cycle starts the Program/Erase Controller.

Once the command is issued subsequent Bus

Read operations read the Status Register. See the

section on the Status Register for details on the

definitions of the Status Register bits.

During the Block Unprotect operation the memory

will only accept the Read Status Register com-

mand. All other commands will be ignored. Typical

Block Protection times are given in Table 9.

See APPENDIX C., Figure 21., Block Unprotect

Flowchart and Pseudo Code, for a suggested flow-

chart on using the Block Unprotect command.

Protection Register Program Command. The

Protection Register Program command is used to

Program the 64 bit user segment of the Protection

the Protection Register Program command.

The first bus cycle sets up the Protection

The second latches the Address and the Data

to be written to the Protection Register and

starts the Program/Erase Controller.

Read operations output the Status Register con-

tent after the programming has started.

The user-programmable segment can be locked

by programming bit 1 of the Protection Register

Lock location to ‘0’ (see Table 7. and Table 8. for

Word-wide and Byte-wide protection addressing).

Bit 0 of the Protection Register Lock location locks

the factory programmed segment and is pro-

grammed to ‘0’ in the factory. The locking of the

Protection Register is not reversible, once the lock

bits are programmed no further changes can be

made to the values stored in the Protection Regis-

ter, see Figure 6., Protection Register Memory

Map. Attempting to program a previously protect-

ed Protection Register will result in a Status Reg-

ister error.

The Protection Register Program cannot be sus-

pended.

See

APPENDIX

C.,

Figure

22., Protection Register Program Flowchart and

Pseudo Code, for the flowchart for using the Pro-

tection Register Program command.

Configure STS Command.

The Configure STS command is used to configure

the Status/(Ready/Busy) pin. After power-up or re-

set the STS pin is configured in Ready/Busy

mode. The pin can be configured in Status mode

using the Configure STS command (refer to Sta-

tus/(Ready/Busy) section for more details.

Two write cycles are required to issue the Config-

ure STS command.

The first bus cycle sets up the Configure STS

command.

The second specifies one of the four possible

configurations (refer to Table 5., Configuration

Codes):

–

Ready/Busy mode

–

Pulse on Erase complete mode

–

Pulse on Program complete mode

–

Pulse on Erase or Program complete

mode

The device will not accept the Configure STS com-

mand while the Program/Erase controller is busy

or during Program/Erase Suspend. When STS pin

is pulsing it remains Low for a typical time of

250ns. Any invalid Configuration Code will set an

error in the Status Register.

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