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74LVC374ADB датащи(PDF) 9 Page - Nexperia B.V. All rights reserved |
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74LVC374ADB датащи(HTML) 9 Page - Nexperia B.V. All rights reserved |
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9 / 19 page ![]() © Nexperia B.V. 2017. All rights reserved 74LVC374A All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 3 — 6 December 2012 9 of 19 Nexperia 74LVC374A Octal D-type flip-flop; 5 V tolerant inputs/outputs; positive-edge trigger; 3-state 11. Waveforms Measurement points are given in Table 8. VOL and VOH are typical output voltage levels that occur with the output load. Fig 7. Clock (CP) to output (Qn) propagation delays, the clock pulse width, output transition times, and the maximum frequency mna894 CP input Qn output tPHL tPLH tW 1/fmax VM VOH VI GND VOL VM Measurement points are given in Table 8. VOL and VOH are typical output voltage levels that occur with the output load. Fig 8. 3-state enable and disable times mna644 tPLZ tPHZ outputs disabled outputs enabled VY VX outputs enabled output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF OFF-to-HIGH OE input VI VOL VOH VCC VM GND GND tPZL tPZH VM VM |
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