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74LVC374A

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Product data sheet

Rev. 3 — 6 December 2012

5 of 19

Nexperia

74LVC374A

Octal D-type flip-flop; 5 V tolerant inputs/outputs; positive-edge trigger; 3-state

6.

Functional description

[1]

H = HIGH voltage level

h = HIGH voltage level one set-up time prior to the LOW-to-HIGH CP transition

L = LOW voltage level

l = LOW voltage level one set-up time prior to the LOW-to-HIGH CP transition

Z = high-impedance OFF-state

 = LOW-to-HIGH clock transition

7.

Limiting values

[1]

The minimum input voltage ratings may be exceeded if the input current ratings are observed.

[2]

The output voltage ratings may be exceeded if the output current ratings are observed.

[3]

For SO20 packages: above 70

C the value of P

tot derates linearly with 8 mW/K.

For SSOP20 and TSSOP20 packages: above 60

C the value of P

tot derates linearly with 5.5 mW/K.

For DHVQFN20 packages: above 60

C the value of P

tot derates linearly with 4.5 mW/K.

Table 3.

Function table[1]

Operating mode

Input

Internal flip-flop Output

OE

CP

Dn

Qn

Load and read register

L



lL

L

L



hH

H

Load register and disable

outputs

H



lL

Z

H



hH

Z

Table 4.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).

Symbol

Parameter

Conditions

Min

Max

Unit

VCC

supply voltage

0.5

+6.5

V

IIK

input clamping current

VI <0 V

50

-

mA

VI

input voltage

[1]

0.5

+6.5

V

IOK

output clamping current

VO >VCC or VO <0 V

-

50

mA

VO

output voltage

output HIGH or LOW state

[2]

0.5

VCC +0.5

V

output 3-state

[2]

0.5

+6.5

V

IO

output current

VO =0V to VCC

-

50

mA

ICC

supply current

-

100

mA

IGND

ground current

100

-

mA

Tstg

storage temperature

65

+150

C

Ptot

total power dissipation

Tamb = 40 C to +125 C

[3]

-500

mW