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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ADUCM320BBCZ датащи(PDF) 26 Page - Analog Devices |
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ADUCM320BBCZ датащи(HTML) 26 Page - Analog Devices |
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26 / 31 page  Data Sheet ADuCM320 Rev. C | Page 25 of 30 Pin No. Mnemonic Type1 Description J11 AIN11/BUF_VREF2V5 AI/AO Analog Input 11 (AIN11). Buffered 2.5 V Bias (BUF_VREF2V5). The maximum load = 1.2 mA. Connect BUF_VREF2V5 to AGNDx via a 100 nF capacitor. H10 AIN12/P4.4 AI/I/O Analog Input 12 (AIN12). Digital I/O Port 4.4 (P4.4). G10 AIN13/P4.5 AI/I/O Analog Input 13 (AIN13). Digital I/O Port 4.5 (P4.5). H9 AIN14/P4.6 AI/I/O Analog Input 14 (AIN14). Digital I/O Port 4.6 (P4.6). G9 AIN15/P4.7 AI/I/O Analog Input 15 (AIN15). Digital I/O Port 4.7 (P4.7). L5 VDAC0/P5.3 AO/I/O Voltage DAC0 Output (VDAC0). Digital I/O Port 5.3 (P5.3). K5 VDAC1 AO Voltage DAC1 Output. L4 VDAC2/P3.7/PLAO[29] AO/I/O Voltage DAC2 Output (VDAC2). Digital I/O Port 3.7 (P3.7). Output of PLA Element 29 (PLAO[29]). K4 VDAC3/P5.0 AO/I/O Voltage DAC3 Output (VDAC3). Digital I/O Port 5.0 (P5.0). J4 VDAC4 AO Voltage DAC4 Output (VDAC4). L3 VDAC5 AO Voltage DAC5 Output (VDAC5). K3 VDAC6/P5.1 AO/I/O Voltage DAC6 Output (VDAC6). Digital I/O Port 5.1 (P5.1). J3 VDAC7/P5.2 AO/I/O Voltage DAC7 Output (VDAC7). Digital I/O Port 5.2 (P5.2). A2 IDAC0 AO IDAC0. 0 mA to 150 mA full-scale output. A3 PVDD0 S Power for IDAC0. B4 CDAMP0 AI Damping Capacitor 0. Connect damping capacitor from this pin to PVDD0. A10 IDAC1 AO IDAC1. 0 mA to 150 mA full-scale output. A9 PVDD1 S Power for IDAC1. B8 CDAMP1 AI Damping Capacitor 1. Connect damping capacitor from this pin to PVDD1. A5 IDAC2 AO IDAC2. 0 mA to 150 mA full-scale output. A4 PVDD2 S Power for IDAC2. B5 CDAMP2 AI Damping Capacitor 2. Connect damping capacitor from this pin to PVDD2. A7 IDAC3 AO IDA3C. 0 mA to 150 mA full-scale output. A8 PVDD3 S Power for IDAC3. B7 CDAMP3 AI Damping Capacitor 3. Connect damping capacitor from this pin to PVDD3. B6 PGND S Power Supply Ground for IDACs. A6 PGND S Power Supply Ground for IDACs. A1 IDAC_TST AI/AO Pin for IDAC Test Purposes. Leave IDAC_TST unconnected. L2 DVDD_1V8 AO 1.8 V Digital Supply. A 470 nF capacitor to DGND1 must be connected to this pin to stabilize the internal 1.8 V regulator that supplies flash memory and the ARM Cortex-M3 processor. K2 DVDD_2V5 AO 2.5 V Digital Supply. A 470 nF capacitor to IOGND3 must be connected to this pin to stabilize the internal 2.5 V regulator that supplies the analog digital control. F9 AVDD_REG0 AO Analog Regulator 0 Supply. A 470 nF capacitor to AGND4 must be connected to this pin to stabilize the internal 2.5 V regulator that supplies the ADC. F10 AVDD_REG1 AO Analog Regulator 1 Supply. Output of 2.5 V on-chip LDO regulator. A 470 nF capacitor to AGND4 must be connected to this pin. This regulator supplies the IDACs. L1 DGND1 S Digital Ground 1 for DVDD_1V8. D10 DGND2 S Digital Ground 2. Connect to DGND1. B1 IOVDD1 S 3.3 V GPIO Supply. |
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