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CS5543 датащи(PDF) 18 Page - Cirrus Logic

номер детали CS5543
подробное описание детали  22-Bit, Multi-Channel DS ADC Chip Set
PDF  30 Pages
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производитель  CIRRUS [Cirrus Logic]
домашняя страница  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS5543 датащи(HTML) 18 Page - Cirrus Logic

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CS5542 CS5543
18
DS109PP2
Conversion Coding
Each of the channels of the CS5543 outputs a 24-
bit conversion data word. The word includes a sign
bit along with 21 additional data bits, an Oscillation
Detect flag (OD), and an odd parity bit. The format
of the data conversion word is shown in Figure 6.
The OD bit is set whenever the modulator in the
CS5542 is overranged to the point of making it lose
stability. Under this condition the output data can
be erroneous. The OD bit can be set whenever the
input magnitude exceeds the full scale point by
greater than 5%. The OD bit will be cleared when-
ever the modulator input comes back into proper
range.
Table 5 illustrates the output coding for the
CS5542/CS5543 chip set. Positive current means
that current is flowing into the INL (INR) pin and
produces a positive output code.
CS5543 Serial Data Interface
The serial data interface on the CS5543 has four in-
put signals and four output signals. Data read from
the CS5543 is output from the DATAOUT[3:0]
pins. DATAOUT[0] outputs data from channels 0
and 4; DATAOUT[1] outputs data from channels 1
and 5; DATAOUT[2] outputs data from channels 2
and 6; and DATAOUT[3] outputs data from chan-
nels 3 and 7. Information from DATAOUT[0] is
output beginning with the sign bit of channel 0 and
ends with the parity (odd) bit of channel 4. Data
out of the other DATAOUT pins follows the same
convention.
In a system, multiple CS5543s are connected with
the DATAOUT pins of one CS5543 connected to
the
DATAIN
pins
of
the
next
CS5543.
DATAOUT[3:0] lines will change immediately af-
ter the rising edge of DATACLK, and be latched
into the DATAIN[3:0] pins on the next rising edge
of DATACLK.
A timing diagram which shows eight channels of
data transfer from one CS5543 to another is shown
in Figure 5.
The data which is transmitted either to or from the
series-connected CS5543s is synchronized by the
FRAME signal. FRAME should be a pulse, one
CLKIN cycle wide, generated by falling edges of
2
23
2
22
2
1
2
0
Sign
2
21
2
20
MSB
LSB OD Parity
2
2
Figure 6. Data Conversion Word Format
Note 1 Positive Full Scale is current going into the modulator.
DOUT = 2,097,151 [(IIN - IOF)/(IFS - IOF)]
where DOUT is the digital output code from the CS5543; IOF is the
current going into the modulator during System Offset Voltage Calibration; IFS is the full scale input current which
is always positive in magnitude and will be the absolute value of the current going into either INL/INR or ICAL
pin, divided by 0.97; and IIN is the current going into the modulator during the conversion. 2,097,151 is 2
21 - 1.
Table 5. Output Coding for CS5542/CS5543.
Bipolar Input Current
Output Code (Sign and 21 Data Bits)
Positive Full Scale1
1
0
0000
0000
0000
0000
0000
Zero Input
0
0
0000
0000
0000
0000
0000
Negative Full Scale
1
1
1111
1111
1111
1111
1111



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