WM8959 datasheet(77/155 Pages) WOLFSON

77 / 155 page

Pre-Production

WM8959

PP, May 2008, Rev 3.1

BUTTON CONTROL

The WM8959 GPIO supports button control detection with full status readback for up to six inputs (or

five inputs and one IRQ output). All inputs are latched at the IRQ Register, with de-bounce available

for normal operation. De-bouncing may be disabled in order to allow the device to respond to wake-

up events while the processor is disabled and is unable to provide a clock for de-bouncing.

To enable button control and accessory detection, the following register settings are required:

•

GPIO1_ENA = 1 (only required if using GPIO1)

•

AIF_SEL = 0 (only required if using GPIO3, GPIO4 or GPIO5)

•

LMN3 = 0, LLI3LO = 0 and RLI3LO = 0 (only required if using GPI7)

•

RMN3 = 0, RRI3LO = 0 and RI3RO = 0 (only required if using GPI8)

•

AIF_TRIS = 0

•

GPIOn_SEL = 0000 for each required GPIO button input

Programmable pull-up and pull-down resistors are available on GPIO1 and GPIO3 to GPIO5. These

should be set according to the external circuit configuration. Note that pull-up and pull-down resistors

are not available on the GPI7 and GPI8 input pins. Note that the analogue input paths to GPI7 and

GPI8 must be disabled as described above when using these as digital inputs.

In this application, one or more of the GPIO pins may be configured as an Interrupt event if desired.

This is controlled by the GPIOn_IRQ_ENA bits described in Table 38. The GPIO Pin status fields

contained in the IRQ Register (R18) may be read at any time or else in response to an Interrupt

event. See Table 47 for more details of the Interrupt function.

An example configuration of the button control GPIO function is illustrated in Figure 42.

Figure 42 Example of Button Control Using GPIO Pins

Note:

•

The GPIOs 1, 3, 4 and 5 are referenced to DBVDD

•

The GPIs 7 and 8 are referenced to AVDD

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