M7010R datasheet(4/67 Pages) STMICROELECTRONICS

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M7010R

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WRITECOMMAND ... ...... ...... ....... ...... ....... ...... ....... ...... ...... ....31

Single Location WRITE Cycle Timing (Figure 22.) . ....... ...... ....... ...... ...... ....32

BurstWRITE of the Data and Mask Arrays (BLEN = 4) (Figure 23.). ....... ...... ...... .... 32

(Single) WRITEAddress Formatfor Data and Mask Arrays or SRAM (Table 22.) ... ...... ....33

WRITEAddress Formatfor Internal Registers (Table 23.) . . ...... ....... ...... ...... ....33

WRITEAddress Formatfor Data and Mask Array(Burst WRITE) (Table 24.) ...... ...... ....33

SEARCH COMMAND . ...... ...... ....... ...... ....... ...... ....... ...... ...... ....34

68-bit Configuration .... ...... ....... ...... ....... ...... ....... ...... ...... .... 34

Hardware Diagram for a Table with a Single Device (68-bitOperation) (Figure 24.) . ...... ....34

68-Bit Configuration SEARCHTiming Diagram (One Device) (Figure 25.)... ...... ...... ....35

Right-Shift of 68-bit Signals for TLSZ Values (Table 25.) . . . ...... ....... ...... ...... ....36

ShiftofSSF and SSV from SADR(for different HLAT Values) (Table 26.) ... ...... ...... ....36

Latency of SEARCH from Instruction to SRAM Access Cycle (68-bit Mode) (Table 27.) .... ....36

68-bit Logical SEARCH ... ...... ....... ...... ....... ...... ....... ...... ...... ....37

x68 Table with One Device (Figure 26.) ... ...... ....... ...... ....... ...... ...... ....37

136-bit Configuration ... ...... ....... ...... ....... ...... ....... ...... ...... ....38

Hardware Diagram for a Table with One Device (136-bit Operation) (Figure 27.) . . . ...... ....38

136-BitConfiguration SEARCH Timing Diagram (One Device) (Figure 28.). . ...... ...... ....39

Right-Shift of 136-bit Signals for TLSZ Values (Table 28.) . . ...... ....... ...... ...... ....40

ShiftofSSF and SSV from SADR(for different HLAT values) (Table 29.) ... ...... ...... ....40

Latency ofSEARCH from Instruction to SRAM Access Cycle (136-bitMode) (Table 30.) ... .... 40

136-bitLogical SEARCH .. ...... ....... ...... ....... ...... ....... ...... ...... ....41

x136 Table with One Device (Figure 29.) . . ...... ....... ...... ....... ...... ...... ....41

272-bit Configuration ... ...... ....... ...... ....... ...... ....... ...... ...... ....42

Hardware Diagram for a Table with One Device (272-bit Operation) (Figure 30.) . . . ...... ....42

272-BitConfiguration SEARCH Timing Diagram (One Device) (Figure 31.). . ...... ...... ....43

Right-Shift of 272-bit Signals for TLSZ Values (Table 31.) . . ...... ....... ...... ...... ....44

ShiftofSSF and SSV from SADR(for different HLAT Values) (Table 32.) ... ...... ...... ....44

Latency ofSEARCH from Instruction to SRAM Access Cycle (272-bitMode) (Table 33.) ... .... 44

272-bitLogical SEARCH .. ...... ....... ...... ....... ...... ....... ...... ...... ....45

x272 Table with One Device (Figure 32.) . . ...... ....... ...... ....... ...... ...... ....45

Mixed-sized Searches on Tables Configured with Different Width Using an M7010R Device 46

Multiwidth Configuration Example (Figure 33.) .... ....... ...... ....... ...... ...... ....46

Timing Diagram for Mixed SEARCH (One Device) (Figure 34.) .... ....... ...... ...... ....47

LRAM and LDEV Description . . . ....... ...... ....... ...... ....... ...... ...... ....48

LEARN COMMAND . . ...... ...... ....... ...... ....... ...... ....... ...... ...... ....48

LEARN Command Timing Diagram (TLSZ = 00) (Figure 35.) ...... ....... ...... ...... ....49

LEARN Timing Diagram (TLSZ = 1, except on LastDevice) (Figure 36.) .... ...... ...... ....50

LEARN Timing Diagram on Device Number 7 (TLSZ = 01) (Figure 37.)..... ...... ...... ....51

SRAM WRITECycle Latencyfrom Second Cycle ofLEARNInstruction (Table 34.) . ...... ....51

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