M7010R datasheet(19/67 Pages) STMICROELECTRONICS

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M7010R

Figure 13. Comparand Register Selection

During SEARCH and LEARN

Figure 14. Addressing the Global Mask

SEARCH-Successful Registers

The device contains eight SEARCH-successful

registers (SSRs) to hold the index of the location

where a successful search occurred. The format of

each register is described in Table 9. The

SEARCH command specifies which SSR stores

the index of a specific SEARCH command in “Cy-

cle B” of the SEARCH Instruction.

After the index location is specified, the host ASIC

can use this register to access that data array,

mask array, or external SRAM using the index as

part of the address (see SRAM ADDRESSING,

page 58). The device with a valid bit set performs

a READ or WRITE operation. All other devices

suppress the operation.

Table 9. SEARCH-Successful Register (SSR) Description

135

Address

Index

AI04275

135

Address

Index

AI04276

SEARCH and WRITE Command

Global Mask Selection

Field

Range

Initial Value

Description

INDEX

[13:0]

Index. This is the address of the 68-bit entry where a successful search

occurs. The device updates this field if it has a successful search. In 136-bit,

the LSB is '0;' in a 272-bit configuration, the two LSBs are '00.' The index

updates if the device is either a local or global winner in a SEARCH

operation.

–

[30:14]

Reserved.

VALID

[31]

Valid. The device sets this bit to '1' if it is a global winner (first device

downstream with a hit) in a SEARCH operation, in a depth-cascaded

configuration.

–

[67:32]

Reserved.

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