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LPW5202

LPW5202 Rev1.7 June-2022

Parameters

Symbol

Test conditions

Min

Typ

Max

Unit

Current limit

level

LPW5202Axxx

ILIM

Refer to Figure 14 and Equation (1)

A

LPW5202xxx21

VIN = 5V, VOUT = 4.5V, TA=25°C

2.10

2.30

2.50

LPW5202xxx15

VIN = 5V, VOUT = 4.5V, TA=25°C

1.4

1.6

1.8

LPW5202xxx11

VIN = 5V, VOUT = 4.5V, TA=25°C

1.20

1.35

1.50

LPW5202xxx06

VIN = 5V, VOUT = 4.5V, TA=25°C

0.55

0.65

0.75

Current limit level accuracy (3) (4)

(LPW5202Axxx)

ACCLIM

VIN = 5V, 500mA < ILIM < 2.5A

10

%

VIN = 5V, 200mA < ILIM < 500mA

15

Short circuit protection level (4)

ISHORT

VIN = 5V, TA=25°C

4.5

6.5

A

Output auto discharge

RDIS

VIN = 5V, VEN = 0V

90

110

130

Ω

Reverse voltage protection (3)

VRVP

VIN = 5V, VOUT - VIN level to trigger off

115

150

mV

Enable logic high voltage level

VIH

VIN = 2.4V to 6V

1.4

V

Enable logic high voltage level

VIL

VIN = 2.4V to 6V

0.4

V

Leakage current on EN pin

ILKG_EN

VEN = VIN = 5V

3.5

μA

Output logic low voltage level

VOL

VIN = 2.4V to 6V, IFLAGB = 10mA

0.1

V

Leakage on FLAGB pin

ILKG_FLAGB

VIN = 5V, VFLAGB = 5V

0.1

μA

FLAGB de-bounce time

tDEB_FLAGB

VIN = 5V, RFLAG_PU

= 10kΩ, TA = 25°C,

time from IOUT hits IOCP to VFLAGB = 0.1V

10

ms

OCP response time (3)

tOCP

VIN = 5V, TA = 25°C, time from IOUT hits

IOCP to IOUT stop rising

3

7

15

μs

Short circuit protection time (3)

tSHORT

VIN = 5V, TA = 25°C, time from IOUT hits

ISHORT to switch turned off

300

ns

Load switch turned on delay (3)

tDON

VIN = 5V, ROUT = 1

0Ω, COUT = 1μF,

time from enabled to VOUT = 0.5

500

μs

Output rising time (3)

tR

VIN = 5V, ROUT = 1

0Ω, COUT = 1μF,

time from VOUT = 0.1

×VIN to 0.9×VIN

600

μs

Load switch turned off delay (3)

tOFF

VIN = 5V, ROUT = 1

0Ω, COUT = 1μF,

time from disabled to VOUT = 0.9

×VIN

1.2

μs

Output discharge time (3)

tDIS

VIN = 5V, ROUT = 1

0Ω, COUT = 1μF,

time from VOUT = 0.9

×VIN to 0.1×VIN

25

μs

Thermal shutdown trigger

TSD

Temperature rising

150

°C

Thermal shutdown release

TSD_REL

Temperature falling

130

°C

Note 3. The parameter does not include the variation from external resistor on ISET.

Note 4. The parameter is guaranteed by design and characterization.