M41T11

Clock operation

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3.1

Clock calibration

The M41T11 is driven by a quartz controlled oscillator with a nominal frequency of

32,768Hz. The devices are tested not to exceed 35 ppm (parts per million) oscillator

frequency error at 25°C, which equates to about ±1.53 minutes per month. With the

calibration bits properly set, the accuracy of each M41T11 improves to better than ±2 ppm

at 25°C.

The oscillation rate of any crystal changes with temperature (see Figure 12 on page 17).

Most clock chips compensate for crystal frequency and temperature shift error with

cumbersome trim capacitors. The M41T11 design, however, employs periodic counter

correction. The calibration circuit adds or subtracts counts from the oscillator divider circuit

at the divide by 256 stage, as shown in Figure 13 on page 17. The number of times pulses

are blanked (subtracted, negative calibration) or split (added, positive calibration) depends

upon the value loaded into the five-bit Calibration byte found in the Control Register. Adding

counts speeds the clock up, subtracting counts slows the clock down.

The Calibration byte occupies the five lower order bits (D4-D0) in the Control register (Addr

7). This byte can be set to represent any value between 0 and 31 in binary form. Bit D5 is a

Sign Bit; '1' indicates positive calibration, '0' indicates negative calibration. Calibration

occurs within a 64minute cycle. The first 62 minutes in the cycle may, once per minute, have

one second either shortened by 128 or lengthened by 256 oscillator cycles. If a binary '1' is

loaded into the register, only the first 2 minutes in the 64 minute cycle will be modified; if a

binary 6 is loaded, the first 12 will be affected, and so on.

Therefore, each calibration step has the effect of adding 512 or subtracting 256 oscillator

cycles for every 125,829,120 actual oscillator cycles, that is +4.068 or –2.034 ppm of

Table 3.

1.

Keys:

S = SIGN Bit

FT = FREQUENCY TEST Bit

ST = STOP Bit

OUT = Output level

X = Don’t care

CEB = Century Enable Bit

CB = Century Bit

Address

Data

Function/range

BCD format

D7

D6

D5

D4

D3

D2

D1

D0

0

ST

10 seconds

Seconds

Seconds

00-59

1

X

10 minutes

Minutes

Minutes

00-59

2.

When CEB is set to '1', CB will toggle from '0' to '1' or from '1' to '0' every 100 years (dependent upon the

initial value set). When CEB is set to '0', CB will not toggle.When CEB is set to '1', CB will toggle from '0' to

'1' or from '1' to '0' every 100 years (dependent upon the initial value set). When CEB is set to '0', CB will

not toggle.

CB

10 hours

Hours

Century/hours 0-1/00-23

3X

X

X

X

X

Day

Day

01-07

4

X

X

10 date

Date

Date

01-31

5

X

X

X

10 M.

Month

Month

01-12

6

10 years

Years

Year

00-99

7

OUT

FT

S

Calibration

Control