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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STR71XF датащи(PDF) 56 Page - STMicroelectronics |
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STR71XF датащи(HTML) 56 Page - STMicroelectronics |
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56 / 78 page  Electrical parameters STR71xF 56/78 4.3.6 TIM timer characteristics Subject to general operating conditions for V33, fMCLK, and TA unless otherwise specified. Refer to Section 4.3.5: I/O port pin characteristics on page 50 for more details on the input/output alternate function characteristics (output compare, input capture, external clock, PWM output...). 4.3.7 EMI - external memory interface Subject to general operating conditions for VDD, fHCLK, and TA unless otherwise specified. The tables below use a variable which is derived from the EMI_BCONn registers (described in the STR71x Reference Manual) and represents the special characteristics of the programmed memory cycle. Table 32. TIM characteristics Symbol Parameter Conditions Min Typ Max Unit tw(ICAP)in Input capture pulse time 2 tCK_TIM tres(TIM) Timer resolution time 1 tPCLK2 fPCLK2 = 30 MHz 33.3 ns fEXT Timer external clock frequency fCK_TIM(MAX) = fMCLK 0 fCK_TIM/4 MHz fCK_TIM = fMCLK = 60 MHz 015 MHz ResTIM Timer resolution 16 bit tCOUNTER 16-bit Counter clock period when internal clock is selected 1 65536 tPCLK2 fPCLK2 = 30 MHz 0.033 2184 µs TMAX_COUNT Maximum Possible Count 65536x 65536 tPCLK fPCLK2 = 30 MHz 143.1 s Table 33. EMI general characteristics Symbol Parameter Value tMCLK CPU clock period 1 / fMCLK tC Memory cycle time wait states tMCLK x (1 + [C_LENGTH]) |
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