M58PR512LE datasheet(58/123 Pages) NUMONYX

58 / 123 page

Enhanced configuration register

M58PR512LE, M58PR001LE

58/123

Enhanced configuration register

The ECR (enhanced configuration register) enables the deep power-down mode and

configures the output driver strength. It is set through the command interface using the Set

Enhanced Configuration Register command.

The contents of the ECR can be read by issuing the Read Electronic Signature command,

and then by reading from the bank base address + 06h.

The ECR is volatile: after a reset or a power-down/power-up sequence the register is set to

the default value. The configuration register bits are described in Table 17.

8.1

Deep power-down mode bit (ECR15)

The deep power-down mode bit, ECR15, enable the deep power-down mode.

The device can only enter the deep power-down mode from standby, by, in any order,

asserting the DPD pin and setting ECR15 to ‘1’.

When the device is in the deep power-down mode, de-asserting the DPD pin and/or

resetting ECR15 causes the device to revert to standby mode.

8.2

Deep power-down polarity bit (ECR14)

The deep power-down polarity bit sets the polarity of the DPD signal.

When:

●

ECR14 = 0, the DPD signal is active Low (default).

●

ECR14 = 1, the DPD signal is active High.

8.3

Output driver control bits (ECR2-ECR0)

The output driver control bits, ECR0, ECR1, and ECR2 select the output driver impedance

best suited to the system requirements.

After reset or power-up the output driver control bits are set to the enhanced configuration

Ω (30 pF) (default)). Optimum

performance is only achieved if the output driver impedance is properly configured.

Once a configuration has been selected, all data and wait output drivers are set to the same

setting.

Table 17 lists the output driver impedances at VDDQ/2 and the loads that correspond for

each ECR2-ECR0 bit configuration.

M58PR512LE датащи(PDF) 58 Page - Numonyx B.V