MPC8260 UPM Timing Diagram, Rev. 2

Freescale Semiconductor

11

UPM Timings

Figure 6 shows the UPM with UPWAIT and one WAEN.

Figure 6. UPM with UPWAIT, One WAEN

CLKIN

ADDR

DATA

PSDVAL

D0

CS

PGPLx

BS

addr

Note:

00: 08ea a800

01: 00a0 0000

02: 00a0 1000 //WAEN=1

03: 00a0 0000

04: 01b5 4405

If UPAWIT is negated, of course the UPM does not wait. However, even if UPWAIT is asserted, a single WAEN

causes a wait of only one cycle for next the RAM pattern. Then it proceeds while ignoring the UPWAIT. That is

why two consecutive WAENs are needed for a continuous UPWAIT.

00

01

02

03

03

04

UPWAIT

internal

UPWAIT