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84C44X датащи(PDF) 21 Page - NXP Semiconductors |
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84C44X датащи(HTML) 21 Page - NXP Semiconductors |
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21 / 38 page ![]() October 1994 22 Philips Semiconductors Product specification 8-bit microcontrollers with OSD and VST 84C44X; 84C64X; 84C84X 12.6.1 DERIVATIVE REGISTER OSDCA Table 11 Derivative register OSDCA (address 40H) Table 12 Description of OSCDA bits 7 6 5 4 3 2 1 0 CC34 CC24 CC14 RBLK ROUND STBY VLVL HLVL BIT SYMBOL FUNCTION 7 CC34 Character colour code bits. These bits are used for colour selection purposes. See Table 24. 6 CC24 5 CC14 4 RBLK Raster blanking control (see Fig.24). When the RBLK bit is: Logic 1, the VOB output is driven HIGH to display the OSD characters on a blank screen. Logic 0, the VOB output returns to its normal output state on the trailing edge of VSYNCN. 3 ROUND Character rounding control (see Figs 22 and 23). The rounding function generates half dots where the corners of two dots meet. The rounding function also works with multiple cell characters. When the ROUND bit is: Logic 1, the rounding function is enabled. Logic 0, the rounding function is disabled. 2 STBY Stand-by. This bit is used to enable or disable the OSD facility. When the STBY bit is: Logic 1, the OSD oscillator is disabled. Logic 0, the OSD oscillator is enabled and the OSD facility is available. 1 VLVL Vertical synchronous signal level (see Fig.21). This bit selects the active level of the VSYNCN input signal. When the VLVL bit is: Logic 1, VSYNCN is active HIGH. Logic 0, VSYNCN is active LOW. 0 HLVL Horizontal synchronous signal level (see Fig.21). This bit selects the active level of the HSYNCN input signal. When the HLVL bit is: Logic 1, HSYNCN is active HIGH. Logic 0, HSYNCN is active LOW. Fig.21 VSYNCN and HSYNCN active level. handbook, full pagewidth (VSYNCN) HSYNCN (HLVL = VLVL = 0) (HLVL = VLVL = 1) characters can be displayed (VSYNCN) HSYNCN MCD180 |
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