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FastEdge™ Series
CY2PP326
Document #: 38-07506 Rev.*D
Page 7 of 9
VT T
Z o = 50 ohm
VT T
5"
5"
C Y 2 PP3 2 6
R T = 5 0 o h m
R T = 50 ohm
VC C
VE E
VB B ( 3 .3 V )
Figure 8. Driving a PECL/ECL Single-ended Input
3. 3V
Zo = 5 0 o h m
3.3V
5"
5"
C Y 2 PP3 2 6
12 0 oh m
12 0 oh m
VC C = 3 . 3 V
VE E = 0 V
LV D S
51 o h m
( 2 p lac es )
33 o h m
( 2 p lac es )
L VPEC L t o
LV D S
Figure 9. Low-voltage Positive Emitter-coupled Logic (LVPECL) to a Low-voltage Differential Signaling (LVDS) Inter-
face
VCC
VDD-2
Y
X
Z
One output is shown for clarity
Figure 10. Termination for LVPECL to HTSL interface for VCC=2.5V would use X=50 Ohms, Y=2300 Ohms,
and Z=1000 Ohms. See application note titled, “PECL Translation, SAW Oscillators, and Specs” for other
signalling standards and supplies.
Ordering Information
Part Number
Package Type
Product Flow
CY2PP326AI
32-pin TQFP
Industrial, –40
° to 85°C
CY2PP326AIT
32-pin TQFP – Tape and Reel
Industrial, –40
° to 85°C
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