OUTPUT CAPACITOR SELECTION

A ceramic output capacitor of 10 µF, 6.3V is sufficient for

most applications. Use X7R or X5R types; do not use Y5V.

DC bias characteristics of ceramic capacitors must be con-

sidered when selecting case sizes like 0805 and 0603. DC

bias characteristics vary from manufacturer to manufacturer

and dc bias curves should be requested from them as part of

the capacitor selection process.

The minimum output capacitance to guarantee good

performance is 5.75µF at 1.8V dc bias including toler-

ances and over ambient temperature range. The output

filter capacitor smoothes out current flow from the inductor to

the load, helps maintain a steady output voltage during

transient load changes and reduces output voltage ripple.

These capacitors must be selected with sufficient capaci-

tance and sufficiently low ESR to perform these functions.

The output voltage ripple is caused by the charging and

discharging of the output capacitor and by the R

be calculated as:

Voltage peak-to-peak ripple due to capacitance can be ex-

pressed as follow:

Voltage peak-to-peak ripple due to ESR =

Because these two components are out of phase the rms

value can be used to get an approximate value of peak-to-

peak ripple.

Voltage peak-to-peak ripple, root mean squared =

Note that the output ripple is dependent on the current ripple

and the equivalent series resistance of the output capacitor

(R

The R

dependent); make sure the value used for calculations is at

the switching frequency of the part.

TABLE 3. Suggested Capacitors and Their Suppliers

Model

Type

Vendor

Voltage Rating

Case size inch (mm)

10 µF for C

OUT

GRM21BR60J106K

Ceramic, X5R

Murata

6.3V

0805 (2012)

C2012X5R0J106K

Ceramic, X5R

TDK

6.3V

0805 (2012)

JMK212BJ106K

Ceramic, X5R

Taiyo-Yuden

6.3V

0805 (2012)

4.7 µF for C

IN

GRM21BR60J475K

Ceramic, X5R

Murata

6.3V

0805 (2012)

JMK212BJ475K

Ceramic, X5R

Taiyo-Yuden

6.3V

0805 (2012)

C2012X5R0J475K

Ceramic, X5R

TDK

6.3V

0805 (2012)

BOARD LAYOUT CONSIDERATIONS

PC board layout is an important part of DC-DC converter

design. Poor board layout can disrupt the performance of a

DC-DC converter and surrounding circuitry by contributing to

EMI, ground bounce, and resistive voltage loss in the traces.

These can send erroneous signals to the DC-DC converter

IC, resulting in poor regulation or instability.

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