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ISL88001/2/3EVAL1Z датащи(PDF) 9 Page - Renesas Technology Corp

номер детали ISL88001/2/3EVAL1Z
подробное описание детали  Ultra Low Power 3 Ld Voltage Supervisors in SC-70 and SOT-23 Packages
PDF  16 Pages
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
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ISL88001/2/3EVAL1Z датащи(HTML) 9 Page - Renesas Technology Corp

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ISL88001, ISL88002, ISL88003
FN6174 Rev 3.00
Page 9 of 15
Feb 10, 2021
Pin Descriptions
RST
The ISL88003 push-pull RST output is set to VDD (HIGH)
whenever the device is first powered up or VDD falls below its
respective minimum voltage sense level.
RST
The RST output functions identically to the complementary
RST output. On the ISL88001, this is a push-pull output. On
the ISL88002, it is an open drain output that is pulled to GND
(LOW) when reset is asserted. Suggested pull-up RST resistor
values are in the range of 5kΩ to 100kΩ.
VDD
The VDD pin is the power supply terminal. The voltage at this
pin is compared against an internal factory-programmed
voltage trip point, VTHVDD. A reset is first asserted when the
device is initially powered up to ensure that the power supply
has stabilized. Thereafter, reset is again asserted whenever
VDD falls below VTHVDD. The device is designed with
hysteresis to help prevent chattering due to noise.
Principles of Operation
The ISL88001, ISL88002, ISL88003 devices provide a low
power, high accuracy solution for those voltage monitoring
applications needing supply voltage supervision with power
reset control. By integrating these features into small 3 Ld SC-
70 and 3 Ld SOT-23 packages and consuming as little as
160nA of supply current, these devices can lower system cost
and reduce board space requirements.
Low Voltage Monitoring
During normal operation, the ISL88001, ISL88002, ISL88003
devices monitor the voltage level of VDD. The device asserts a
reset signal (RST = LOW or RST = HIGH) to a µP/µC if this
voltage is less than the preset voltage trip point. The reset
signal prevents system operation during a power failure or
brownout condition. This reset signal remains asserted until
VDD exceeds the voltage threshold setting for the reset time
delay period tPOR. See Figure 2.
RESET / RESET
VOL
Reset Output Voltage Low
VDD < VTHVDD, for ISL88001
0.2
0.40
V
VDD < VTHVDD, Sinking 0.5mA for ISL88002
0.2
0.40
V
VDD VTHVDD, for ISL88003
0.2
0.40
V
VOH
Reset Output Voltage High
VDD > VTHVDD, for ISL88001
VDD - 0.4 VDD - 0.2
V
VDD > VTHVDD, Sourcing 0.5mA, ISL88002
VDD - 0.2
V
VDD < VTHVDD, for ISL88003
VDD - 0.4 VDD - 0.2
V
tRPD
VTH to Reset Asserted Delay
15
µs
tPOR
POR Timeout Delay
140
200
260
ms
CLOAD
Load Capacitance on Reset Pin
5
pF
NOTE:
8. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
Electrical Specifications Over the recommended operating conditions unless otherwise specified. (Continued)Boldface limits apply
over the operating temperature range, -40°C to +85°C.
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
(Note 8)
TYP
MAX
(Note 8) UNITS
ISL88001
RPU*
ISL88002*
FIGURE 1. TYPICAL APPLICATION DIAGRAM
GND
VDD
ISL88003
µP/µC
GND
VDD
VDD
RESET
INPUT
RESET
OUTPUT
*Necessary for ISL88002



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