1024-Bit EEPROM iButton

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7

Memory Access

Data memory and registers are located in a linear

address space, as shown in Figure 5. The data memory

and the registers have unrestricted read access. The

DS1972 EEPROM array consists of 18 rows of 8 bytes

each. The first 16 rows are divided equally into four

memory pages (32 bytes each). These four pages are

the primary data memory. Each page can be individu-

ally set to open (unprotected), write protected, or

EPROM mode by setting the associated protection byte

in the register row. As a factory default, the entire data

memory is unprotected and its contents are undefined.

The last two rows contain protection registers and

reserved bytes. The register row consists of 4 protec-

tion-control bytes, a copy-protection byte, the factory

byte, and 2 user byte/manufacture ID bytes. The manu-

facturer ID can be a customer-supplied identification

code that assists the application software in identifying

the product with which the DS1972 is associated.

Contact the factory to set up and register a custom

manufacturer ID. The last row is reserved for future use.

It is undefined in terms of R/W functionality and should

not be used.

In addition to the main EEPROM array, an 8-byte

volatile scratchpad is included. Writes to the EEPROM

array are a two-step process. First, data is written to the

scratchpad and then copied into the main array. This

allows the user to first verify the data written to the

scratchpad prior to copying into the main array. The

device only supports full row (8-byte) copy operations.

For data in the scratchpad to be valid for a copy opera-

tion, the address supplied with a Write Scratchpad

command must start on a row boundary, and 8 full

bytes must be written into the scratchpad.

ADDRESS RANGE

TYPE

DESCRIPTION

PROTECTION CODES

0000h to 001Fh

R/(W)

Data Memory Page 0

—

0020h to 003Fh

R/(W)

Data Memory Page 1

—

0040h to 005Fh

R/(W)

Data Memory Page 2

—

0060h to 007Fh

R/(W)

Data Memory Page 3

—

0080h*

R/(W)

Protection-Control Byte Page 0

55h: Write Protect P0; AAh: EPROM Mode P0;

55h or AAh: Write Protect 80h

0081h*

R/(W)

Protection-Control Byte Page 1

55h: Write Protect P1; AAh: EPROM Mode P1;

55h or AAh: Write Protect 81h

0082h*

R/(W)

Protection-Control Byte Page 2

55h: Write Protect P2; AAh: EPROM Mode P2;

55h or AAh: Write Protect 82h

0083h*

R/(W)

Protection-Control Byte Page 3

55h: Write Protect P3; AAh: EPROM Mode P3;

55h or AAh: Write Protect 83h

0084h*

R/(W)

Copy Protection Byte

55h or AAh: Copy Protect 0080h:008Fh, and Any

Write-Protected Pages

0085h

R

Factory Byte. Set at Factory.

AAh: Write Protect 85h, 86h, 87h;

55h: Write Protect 85h; Unprotect 86h, 87h

0086h

R/(W)

User Byte/Manufacturer ID

—

0087h

R/(W)

User Byte/Manufacturer ID

—

0088h to 008Fh

—

Reserved

—

Figure 5. Memory Map

*

Once programmed to AAh or 55h this address becomes read only. All other codes can be stored, but neither write protect the

address nor activate any function.