TH8082

Enhanced SoloLIN Transceiver

TH8082 – Datasheet

Page 13 of 26

3901008082

Feb 2007

Rev 007

3.4

LIN BUS Transceiver

The transceiver consists a bus-driver (1.2V@40mA) with slew rate control, current limitation and as well in

the receiver a high voltage comparator followed by a debouncing unit.

BUS Input/Output

The recessive BUS level is generated from the integrated 30k pull up resistor in serial with a diode This

No additional termination resistor is necessary to use the TH8082 in LIN slave nodes. If this IC is used for

LIN master nodes it is necessary that the BUS pin is terminated via a external 1k

Ω resistor in serial with a

diode to VBAT or INH (See chapter 4.4 Short circuit to ground).

TxD Input

During transmission the data at the pin TxD will be transferred to the BUS driver for generating a BUS signal.

To minimize the electromagnetic emission of the bus line, the BUS driver is equipped with an integrated slew

rate control and wave shaping unit.

Transmitting will be interrupted in the following cases:

-

Sleep mode

-

Thermal Shutdown active

-

The CMOS compatible input TxD controls directly the BUS level:

TxD = low

->

BUS = low (dominant level)

TxD = high

->

BUS = high (recessive level)

The TxD pin has an internal pull up resistor connected to VCC. This secures that an open TxD pin generates

a recessive BUS level.

RxD Output

The data signals from the BUS pin will be transferred continuously to the pin RxD. Short spikes on the bus

signal are suppressed by the implemented debouncing circuit.

BUS

RxD

VS

50%

60%

40%

Figure 7 - Receive impulse diagram