TDA2SXABC datasheet(95/427 Pages) TI2

95 / 427 page

TDA2SX, TDA2SG, TDA2SA

TDA2HG, TDA2HV, TDA2HF, TDA2LF

www.ti.com

SPRS951F – DECEMBER 2015 – REVISED MAY 2019

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Product Folder Links: TDA2SX TDA2SG TDA2SA TDA2HG TDA2HV TDA2HF TDA2LF

Terminal Configuration and Functions

4.4

Signal Descriptions

Many signals are available on multiple pins, according to the software configuration of the pin multiplexing

options.

1. SIGNAL NAME: The name of the signal passing through the pin.

NOTE

The subsystem multiplexing signals are not described in Table 4-2 and Table 4-3.

2. DESCRIPTION: Description of the signal

3. TYPE: Signal direction and type:

–

I = Input

–

O = Output

–

IO = Input or output

–

D = Open Drain

–

DS = Differential Signaling

–

A = Analog

–

PWR = Power

–

GND = Ground

4. BALL: Associated ball(s) number

NOTE

For more information, see the Control Module / Control Module Register Manual section of

the device TRM.

4.4.1

Video Input Port (VIP)

NOTE

For more information, see the Video Input Port (VIP) section of the device TRM.

CAUTION

The I/O timings provided in Section 7 Timing Requirements and Switching

Characteristics are applicable for all combinations of signals for vin1, vin5 and

vin6. However, the timings are valid only for vin2, vin3, and vin4 if signals within

a single IOSET are used. The IOSETs are defined in the Table 7-4, Table 7-5

and Table 7-6.

Table 4-4. VIP Signal Descriptions

SIGNAL NAME

DESCRIPTION

TYPE

BALL

Video Input 1 (VIP1)

vin1a_clk0

Video Input 1 Port A Clock input.Input clock for 8-bit 16-bit or 24-bit Port A

video capture. Input data is sampled on the CLK0 edge.

AG8

vin1a_de0

Video Input 1 Port A Data Enable input

AD9

vin1a_fld0

Video Input 1 Port A Field ID input

AF9

vin1a_hsync0

Video Input 1 Port A Horizontal Sync input

AE9

vin1a_vsync0

Video Input 1 Port A Vertical Sync input

AF8

vin1a_d0

Video Input 1 Port A Data input

AE8

vin1a_d1

Video Input 1 Port A Data input

AD8

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