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CC115LRGP датащи(PDF) 56 Page - Texas Instruments |
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CC115LRGP датащи(HTML) 56 Page - Texas Instruments |
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56 / 74 page ![]() CC115L SWRS105B – MAY 2011 – REVISED JUNE 2014 www.ti.com Table 5-52. 0x35 (0xF5): MARCSTATE - Main Radio Control State Machine State Bit Field Name Reset R/W Description 7:5 R0 Not used Main Radio Control FSM State Value State name State (see Figure 5-9) 0 (0x00) SLEEP SLEEP 1 (0x01) IDLE IDLE 2 (0x02) XOFF XOFF 3 (0x03) VCOON_MC MANCAL 4 (0x04) REGON_MC MANCAL 5 (0x05) MANCAL MANCAL 6 (0x06) VCOON FS_WAKEUP 7 (0x07) REGON FS_WAKEUP 8 (0x08) STARTCAL CALIBRATE 9 (0x09) BWBOOST SETTLING 4:0 MARC_STATE[4:0] R 10 (0x0A) FS_LOCK SETTLING 11 (0x0B) Reserved 12 (0x0C) ENDCAL CALIBRATE 13 (0x0D) – 17 Reserved (0x11) 18 (0x12) FSTXON FSTXON 19 (0x13) TX TX 20 (0x14) TX_END TX 21 (0x15) Reserved TXFIFO_UNDERF 22 (0x16) TXFIFO_UNDERFLOW LOW Note: it is not possible to read back the SLEEP or XOFF state numbers because setting CSn low will make the chip enter the IDLE mode from the SLEEP or XOFF states. Table 5-53. 0x38 (0xF8): PKTSTATUS - Current GDOx Status and Packet Status Bit Field Name Reset R/W Description 7:3 R Reserved Current GDO2 value. Note: the reading gives the non-inverted value irrespective of what IOCFG2.GDO2_INV is programmed to. 2 GDO2 R It is not recommended to check for PLL lock by reading PKTSTATUS[2] with GDO2_CFG=0x0A. 1 R0 Not used Current GDO0 value. Note: the reading gives the non-inverted value irrespective of what IOCFG0.GDO0_INV is programmed to. 0 GDO0 R It is not recommended to check for PLL lock by reading PKTSTATUS[0] with GDO0_CFG=0x0A. Table 5-54. 0x3A (0xFA): TXBYTES - Underflow and Number of Bytes Bit Field Name Reset R/W Description 7 TXFIFO_UNDERFLOW R 6:0 NUM_TXBYTES R Number of bytes in TX FIFO 56 Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC115L |
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