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TMUX7436FPWR датащи(PDF) 39 Page - Texas Instruments |
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TMUX7436FPWR датащи(HTML) 39 Page - Texas Instruments |
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39 / 50 page ![]() 8.4.3 Truth Tables Table 8-1 and Table 8-2 provides the truth tables for the TMUX7436F under normal and fault conditions. Table 8-1. TMUX7436F Truth Table EN SEL2 SEL1 Normal Condition Fault Condition State of Specific Flag (SF) when fault occurs on On Switch S1A S1B S2A S2B 0 0 0 None 0 1 1 1 0 0 1 None 1 0 1 1 0 1 0 None 1 1 1 0 0 1 1 None 1 1 0 1 1 0 0 S1B, S2B 0 1 1 1 1 0 1 S1A, S2B 1 0 1 1 1 1 0 S1B, S2A 1 1 1 0 1 1 1 S1A, S2A 1 1 0 1 Take note, more than one source pin can be in fault at a given time. As Table 8-1 provides, the SF pin will assert low even when multiple source pins are under fault. Table 8-2. TMUX7436F DR Truth Table DR PIN STATE Dx State During Fault Condition 0 Pulled up to VDD or VSS 1 Open (HI-Z) If unused, then SELx pins must be tied to GND to ensure the device does not consume additional current (for more information, refer to Implications of Slow or Floating CMOS Inputs. Unused signal path inputs (Sx or Dx) should be connected to GND. www.ti.com TMUX7436F SCDS459A – OCTOBER 2022 – REVISED NOVEMBER 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 39 Product Folder Links: TMUX7436F |
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