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TMUX7436FPWR датащи(PDF) 29 Page - Texas Instruments

номер детали TMUX7436FPWR
подробное описание детали  TMUX7436F ±60 V Fault-Protected, Dual 2:1 Multiplexer With Latch-Up Immunity and 1.8 V Logic
PDF  50 Pages
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производитель  TI2 [Texas Instruments]
домашняя страница  https://www.ti.com
Logo TI2 - Texas Instruments

TMUX7436FPWR датащи(HTML) 29 Page - Texas Instruments

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VS
0 V
tRESPONSE (VDD)
Output
VDD + 0.5 V
0 V
Output × 50%
VDD
VS
0 V
tRESPONSE (VSS)
Output
VSS - 0.5 V
0 V
Output × 50%
VSS
tRESPONSE = max ( tRESPONSE(VDD), tRESPONSE(VSS))
Max positive fault
Max negative fault
60V/µs
ramp
60 V/µs
ramp
RL
VDD
VSS
VDD
VSS
0.1 µF
0.1 µF
S1A
GND
D1
Output
S1B
CL
RL
S2A
D2
Output
S2B
CL
VS
VS
Figure 7-9. Fault Response Time Measurement Setup
7.9 Fault Recovery Time
Fault recovery time (tRECOVERY) measures the delay between the source voltage falling from overvoltage
condition to below supply voltage (VDD or VSS) plus 0.5 V and the drain voltage rising from 0 V to 50% of
the final output voltage. Figure 7-10 shows the setup used to measure tRECOVERY.
RL
VDD
VSS
VDD
VSS
0.1 µF
0.1 µF
S1A
GND
D1
Output
S1B
CL
RL
S2A
D2
Output
S2B
CL
VS
VS
VS
tRECOVERY (VDD)
Output
VDD + 0.5 V
0 V
Output × 50%
Output
0 V
tRECOVERY = max ( tRECOVERY(VDD), tRECOVERY(VSS))
0 V
VSS - 0.5 V
0 V
Output x 50%
tRECOVERY (VSS)
VS
Figure 7-10. Fault Recovery Time Measurement Setup
7.10 Fault Flag Response Time
Fault flag response time (tRESPONSE(FLAG)) measures the delay between the source voltage exceeding the fault
supply voltage (VDD or VSS) by 0.5 V and the general fault flag (FF) pin to go below 10% of its original value.
Figure 7-11 shows the setup used to measure tRESPONSE(FLAG).
www.ti.com
TMUX7436F
SCDS459A – OCTOBER 2022 – REVISED NOVEMBER 2022
Copyright © 2022 Texas Instruments Incorporated
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Product Folder Links: TMUX7436F



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