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TMP464

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SBOS835C – MAY 2017 – REVISED OCTOBER 2019

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7.5.1.5 Timeout Function

The TMP464 device resets the serial interface if either SCL or SDA are held low for 17.5 ms (typical) between a

start and stop condition. If the TMP464 device is holding the bus low, the device releases the bus and waits for a

start condition. To avoid activating the timeout function, maintain a communication speed of at least 1 kHz for the

SCL operating frequency.

7.5.1.6 High-Speed Mode

For the two-wire bus to operate at frequencies above 1 MHz, the master device must issue a high-speed mode

(HS-mode) master code (0000 1xxx) as the first byte after a start condition to switch the bus to high-speed

operation. The TMP464 device does not acknowledge the master code byte, but switches the input filters on

SDA and SCL and the output filter on SDA to operate in HS-mode, allowing transfers up to 2.56 MHz. After the

HS-mode master code is issued, the master transmits a two-wire slave address to initiate a data transfer

operation. The bus continues to operate in HS-mode until a stop condition occurs on the bus. Upon receiving the

stop condition, the TMP464 device switches the input and output filters back to fast mode.

7.5.2 TMP464 Register Reset

The TMP464 registers can be software reset by setting bit 15 of the Software Reset register (20h) to 1. This

software reset restores the power-on-reset state to all TMP464 registers and aborts any conversion in progress.

7.5.3 Lock Register

All of the configuration and limit registers may be locked for writes (making the registers write-protected), which

decreases the chance of software runaway from issuing false changes to these registers. The Lock column in

Table 3 identifies which registers may be locked. Lock mode does not effect read operations. To activate the lock

mode, Lock Register C4h must be set to 0x5CA6. The lock only remains active while the TMP464 device is

powered up. Because the TMP464 device does not contain nonvolatile memory, the settings of the configuration

and limit registers are lost once a power cycle occurs regardless if the registers are locked or unlocked.

In lock mode, the TMP464 device ignores a write operation to configuration and limit registers except for Lock

Register C4h. The TMP464 device does not acknowledge the data bytes during a write operation to a locked

register. To unlock the TMP464 registers, write 0xEB19 to register C4h. The TMP464 device powers up in locked

mode, so the registers must be unlocked before the registers accept writes of new data.