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ICS87421AMILF датащи(PDF) 1 Page - Integrated Device Technology

номер детали ICS87421AMILF
подробное описание детали  첨1/첨2 DIFFERENTIAL-TO-LVDS CLOCK GENERATOR
PDF  14 Pages
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производитель  IDT [Integrated Device Technology]
домашняя страница  http://www.idt.com
Logo IDT - Integrated Device Technology

ICS87421AMILF датащи(HTML) 1 Page - Integrated Device Technology

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÷1/÷2 DIFFERENTIAL-TO-LVDS
CLOCK GENERATOR
ICS87421I
IDT/ ICSLVDS CLOCK GENERATOR
1
ICS87421AMI REV. A OCTOBER 3, 2007
GENERAL DESCRIPTION
The ICS87421I is a high perfor mance ÷1/÷2
Differential-to-LVDS Clock Generator and a mem-
ber of the HiPerClockS™ family of High Perfor-
mance Clock Solutions from IDT. The CLK, nCLK
pair can accept most standard differential input
levels. The ICS87421I is characterized to operate from a 3.3V
power supply. Guaranteed part-to-part skew characteristics
make the ICS87421I ideal for those clock distribution applica-
tions demanding well defined performance and repeatability.
FEATURES
• One differential LVDS output
• One differential CLK, nCLK input pair
• CLK, nCLK pair can accept the following differential input
levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL
• Maximum clock input frequency: 1GHz
• Translates any single ended input signal (LVCMOS, LVTTL,
GTL) to LVDS levels with resistor bias on nCLK input
• Part-to-part skew: 500ps (maximum)
• Propagation delay: 1.7ns (maximum)
• Additive phase jitter, RMS @ 155.52MHz: 0.17ps (typical)
• Full 3.3V operating supply
• -40°C to 85°C ambient operating temperature
• Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
BLOCK DIAGRAM
PIN ASSIGNMENT
ICS87421I
8-Lead SOIC
3.90mm x 4.90mm x 1.37mm package body
M Package
Top View
CLK
nCLK
MR
F_SEL
1
2
3
4
HiPerClockS™
ICS
VDD
Q
nQ
GND
8
7
6
5
Q
nQ
CLK
nCLK
MR
F_SEL
0
1
÷1
÷2
R


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