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PCM1795DBRG4 датащи(PDF) 22 Page - Texas Instruments |
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PCM1795DBRG4 датащи(HTML) 22 Page - Texas Instruments |
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22 / 68 page ![]() Reset Reset Removal 1024SystemClocks InternalReset SystemClock RST (Pin14) t (RST) 1.4V Reset 1024SystemClocks V DD 2.4V(Max) 2V(Typ) 1.6V(Min) InternalReset SystemClock ResetRemoval PCM1795 SLES248A – MAY 2009 – REVISED MARCH 2015 www.ti.com 7.5.1.2 Power-On and External Reset Functions The PCM1795 includes a power-on reset function, as shown in Figure 40. With VDD > 2 V, the power-on reset function is enabled. The initialization sequence requires 1024 system clocks from the time VDD > 2 V. After the initialization period, the PCM1795 is set to its default reset state, as described in Mode Control Registers. The PCM1795 also includes an external reset capability using the RST input (pin 14). This feature allows an external controller or master reset circuit to force the PCM1795 to initialize to the default reset state. Figure 41 and Table 5 show the external reset operation and timing. The RST pin is set to logic 0 for a minimum of 20 ns. The RST pin is then set to a logic 1 state, thus starting the initialization sequence that requires 1024 system clock periods. The external reset is especially useful in applications where there is a delay between the PCM1795 power-up and system clock activation. Figure 40. Power-On Reset Timing Figure 41. External Reset Timing Table 5. External Reset Timing Characteristics for Figure 41 MIN MAX UNIT t(RST) Reset pulse duration, low 20 ns 7.5.2 Function Descriptions 7.5.2.1 Zero Detect The PCM1795 has a zero-detect function. When the PCM1795 detects the zero conditions as shown in Table 6, the PCM1795 sets ZEROL (pin 1) and ZEROR (pin 2) high. 22 Submit Documentation Feedback Copyright © 2009–2015, Texas Instruments Incorporated Product Folder Links: PCM1795 |
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