9.2.1.1 Design Requirements

9.2.1.1.1 Enable, Disable, and Reference Voltage Guidelines

In the previous figure, Vref_B is connected through a 200-kΩ resistor to a 3.3 V power supply and Vref_A is set

to 1.8 V. The A1 and A2 channels have a maximum output voltage equal to Vref_A and the B1 and B2 channels

have has a maximum output voltage equal to VPU.

The LSF family has an EN input that is used to disable the device by setting EN LOW, placing all I/Os

in the high-impedance state. Since the LSF family of devices are switch-type voltage translators, the power

consumption is very low. TI recommends always enabling the LSF family for bidirectional applications (I2C,

SMBus, PMBus, or MDIO).

Table 9-2. Application Operating Condition

PARAMETER

MIN

TYP

MAX

UNIT

Vref_A (1)

reference voltage (A)

0.65

5.5

V

Vref_B

reference voltage (B)

Vref_A + 0.8

5.5

V

VI(EN)

input voltage on EN pin

Vref_A + 0.8

5.5

V

VPU

pull-up supply voltage

0

Vref_B

V

(1)

Vref_A is required to be the lowest voltage level across all inputs and outputs.

Note

The 200 kΩ, bias resistor is required to allow Vref_B to regulate the EN input and properly bias the

device for translation.

9.2.1.1.2 Bias Circuitry

For proper operation, VCCA must always be at least 0.8 V less than VCCB (VCCA + 0.8 ≦ VCCB). The 200 kΩ bias

resistor is required to allow Vref_B to regulate the EN input and properly bias the device for translation. A 0.1 µF

capacitor is recommended for providing a path from Vref_B to ground for high frequency noise. Vref_B and VI(EN)

are recommended to be 1.0 V higher than Vref_A for best signal integrity.

Attempting to drive the EN pin directly with a push-pull output device is a very common design error with the

LSF0101 series of devices. It is also very important to note that current does flow into the A-side voltage supply

during normal operation. Not all voltage sources can sink current, so be sure that applicable designs can handle

this current. For more design details, see the Understanding the Bias Circuit for the LSF Family video.

1.8 V

Vref_A

VCCB

EN

200 kΩ

Vref_B

3.3 V

A1

B1

0.1 µF

Figure 9-2. Bias Circuitry Inside the LSF010x Device

LSF0101

SDLS973 – JUNE 2023

www.ti.com

12

Submit Document Feedback

Copyright © 2023 Texas Instruments Incorporated

Product Folder Links: LSF0101