M41T83RM6F datasheet(20/64 Pages) STMICROELECTRONICS

20 / 64 page

Clock operation

M41T82, M41T83

20/64

DocID012578 Rev 19

3.1

Clock data coherency

In order to synchronize the data during reads and writes of the real-time clock device, a set

of buffer transfer registers resides between the I2C serial interface on the user side, and the

clock/calendar counters in the part. While the read/write data is transferred in and out of the

device one bit at a time to the user, the transfers between the buffer registers and counters

occur such that all the bits are copied simultaneously. This keeps the data coherent and

ensures that none of the counters are incremented while the data is being transferred.

Figure 16. Clock data coherency

3.1.1

Example of incoherency

Without having the intervening buffer/transfer registers, if the user began directly reading

the counters at 23:59:59, a read of the seconds register would return 59 seconds. After the

address pointer incremented, the next read would return 59 minutes. Then the next read

should return 23 hours, but if the clock happened to increment between the reads, the user

would see 00 hours. When the time was re-assembled, it would appear as 00:59:59, and

thus be incorrect by one hour.

By using the buffer/transfer registers to hold a copy of the time, the user is able to read the

entire set of registers without any values changing during the read.

Similarly, when the application needs to change the time in the counters, it is necessary that

all the counters be loaded simultaneously. Thus, the user writes sequentially to the various

buffer/transfer registers, then they are copied to the counters in a single transfer thereby

coherently loading the counters.

32KHz

OSC

DIVIDE BY 32768

1 Hz

READ / WRITE

BUFFER-TRANSFER

REGISTERS

I2C

INTERFACE

CENTURIES

YEARS

MONTHS

DATE

DAY-OF-WEEK

HOURS

MINUTES

SECONDS

COUNTER

RTC

COUNTERS

AFTER A WRITE, DATA IS TRANSFERRED

FROM BUFFERS TO COUNTERS

AT START OF READ OR WRITE,

DATA IN COUNTERS IS COPIED TO

BUFFER/TRANSFER REGISTERS.

WATCHDOG

NON-CLOCK

REGISTERS

SQUAREWAVE

CALIBRATION

ALARM / HALT

HALT BIT SET AT POWER-DOWN

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