L9963E datasheet(84/184 Pages) STMICROELECTRONICS

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•

TCYCLE refers to the internal counter determining the routine period (sum of active and idle phases). It

can be programmed via the TCYCLE (for operation in Normal state) and TCYCLE_SLEEP (for operation in

Cyclic Wakeup state) bit fields. Available values are listed in Table 68:

–

TROUTINE refers to the duration of the active phase. It’s a variable time interval depending on how many

steps have been scheduled for execution and their duration;

–

DUTY_ON is a flag set during the active phase, that is during TROUTINE , independently of the routine

execution mode;

–

The idle phase lasts TCYCLE - TROUTINE. Hence the routine duty-cycle is represented by the ratio

TROUTINE / TCYCLE;

–

TCYCLE_OVF is a latch set when TROUTINE > TCYCLE. This anomalous situation is often referred to

an overflow because it leads to duty-cycle saturation (100%);

•

NCYCLE refers to the internal counter that is incremented by one every time a routine period ends. It is

useful for scheduling optional step execution every X cycles.

–

NCYCLE_X refers to a threshold specifying the X-th step periodicity. It can be programmed

independently of each step via SPI (e.g. NCYCLE_GPIO = ‘010’ specifies that GPIO conversion must

take place every 4 cycles). Refer to Section 4.12.4 Operations periodicity for all the available options.

4.12.1

Routine structure

The voltage conversion routine is structured as follows:

Figure 22. Voltage conversion routine

The steps are organized as follows:

•

Mandatory checks: they are fixed and cannot be excluded. They perform main operations such as Cells and

VBAT measurement;

–

Balance is paused if BAL_AUTO_PAUSE = 1.

•

Optional checks: they can be excluded or periodically executed. Each step periodicity can be configured

independently via its NCYCLE_X bit field (e.g. the NCYCLE_GPIO field programs the cyclic execution of the

GPIO conversion);

–

Steps involving the GPIOs do not affect balancing.

–

Steps involving Cell Terminal, Balance Terminal and HWSC require balance to be stopped

independently of the BAL_AUTO_PAUSE value.

In case balance is paused during a step, balance timer is frozen if BAL_TIM_AUTO_PAUSE = 1, otherwise it

keeps running even if balance operation is temporarily interrupted. Refer to Figure 25 in order to understand the

functionality of BAL_AUTO_PAUSE and BAL_TIM_AUTO_PAUSE bit.

Refer to Figure 25 for a graphic example of the BAL_AUTO_PAUSE and BAL_TIM_AUTO_PAUSE bit.

L9963E

Voltage conversion routine

DS13636 - Rev 12

page 84/184

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