L9924TR datasheet(46/85 Pages) STMICROELECTRONICS

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Electrical specifications

L9924

46/85

DocID029638 Rev 2

5.3.21

Reset output (nRST_SP)

In case VDD pin regulator is turned on and the voltage exceeds the VDD reset threshold

voltage VRTH, the reset pin nRST_SP is pulled up by STM8 internal pull-up resistor (nRST

side) to VDD pin voltage after a 2ms (typ.) reset delay time. This is necessary to provide a

suitable microcontroller startup phase when the system is switched on.

A reset pulse tRP (typ. 2ms) is generated in case of:



VDD pin voltage lower than VRTL parameter



Watchdog failure

6IVDDpeak

Peak output

current

V(A+/B+) > 6 V

V(VDD_CAP)>VRTL

-75

7IVDDshort

Short circuit

output current

Current limitation

-185

-130

-75

8VDDLiR

Line regulation

voltage

6 V ≤ V(A+/B+) ≤ 40 V

I(VDD_CAP) = -30 mA constant

during test

-3.8

+3.8

9tTSD

Deactivation time

after thermal

shut-down

-0.8

1.0

1.5

VDDFAIL

Output voltage

fail threshold

VDD_CAP pin forced when

regulator is disabled

-2

tVDDSHTstart

Start-up short-to-

ground detection

time

V(VDD_CAP) < VDDFAIL

during regulator start-up

3.4

4.0

7.0

tVDDFAIL (1)

Short-to-ground

detection time

V(VDD_CAP) < VDDFAIL

1.7

2.0

3.5

µs

dVDD/dt

dV(VDD_CAP)/dt

@ 5-V regulator

switch-on

CVDD_CAP = 680 nF

I(VDD_CAP) = -3.5 mA

Slope from:

0.5 V → 1 V

1 V → 0.9*VDD

If current limitation is reached, then

the slope is controlled by current

limitation and output capacitor

V/ms

1. If short-to-ground time exceeds tVDDFAIL then VDD regulator is permanently kept off and only a Power-On Reset (PORn)

can restart functionality.

Table 30. 5-V (VDD) voltage regulator electrical characteristics (continued)

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

Table 31. Reset output (nRST_SP) electrical characteristics

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

1VRTH

VDD reset threshold voltage

V(VDD) increasing

4.5

4.7

4.9

2VRTL

VDD reset threshold voltage

V(VDD) decreasing

4.4

4.6

4.8

3VRTHyst VDD threshold voltage hysteresis -

0.1

4VRESETL nRST_SP low output voltage

V(VDD) > 1 V

-0.2

0.4

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