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L9026 датащи(PDF) 16 Page - STMicroelectronics |
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L9026 датащи(HTML) 16 Page - STMicroelectronics |
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16 / 60 page ![]() Table 10. Functions availability in different supply conditions Function Undervoltage condition on VBATT VBATT not in undervoltage Operating modes VDDIO ≤ VDDIOUV VDDIO > VDDIOUV VDDIO ≤ VDDIOUV VDDIO > VDDIOUV Channels u u u u Sleep u u u u Idle u u a (1) a Active u u a (1) a (1) Limp Home SPI communication u u u u Sleep u a u a Idle u a u a Active u a (2) u a (2) Limp Home SPI registers r r r r Sleep r a r a Idle r a r a Active r a (2) r a (2) Limp Home 1. IN pins only. 2. Read only. where: • "a" stands for available • "u" stands for unavailable • "r" stands for reset 6.4 Analog & Digital supply (VBATT) The VBATT is used to supply the internal logic, analog and digital, in normal condition (no under voltage on VBATT) and the output loads. In case the voltage drops below VBATT(UV_L) the under voltage mechanism is triggered and the bit STA_1.VS_UV is reported via SPI. Once the faulty condition disappears (VBATT > VBATT(UV_H)), the bit remains latched until its status is acknowledged by the microcontroller via SPI. Under voltage condition on VBATT influences the status of the channels as described in Table 8. 6.5 I/O Supply (VDDIO) VDDIO is the supply for all pins that interface with the external microcontroller and also work as feed for the internal logic if VBATT is in under voltage condition. In case the voltage drops below VDDIO(UV) the under voltage mechanism is triggered and the bit STA_1. VDD_UV is reported via SPI. This is valid if digital POR_N is ‘1’. For all conditions that generate a POR_N=0, a dedicated clear on read STA_1.POR_N bit is set. Once the faulty condition disappears, the bit remains latched until its status is acknowledged by the microcontroller via SPI. 6.6 Power up The IC performs Power-up procedure when VBATT is applied to the device and the INn or IDLE pins are set to “high”. To complete power-up procedure VBATT > 6 V (min Supply Voltage Range for normal operations) shall be applied, no matter which voltage is present on VDDIO, that may also be left disconnected. Only after power completion, the device is fully able to guarantee the behavior as described in the Table 8 and Section 6.3. L9026 Power supply DS13397 - Rev 9 page 16/60 |
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