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VND9012AJ датащи(PDF) 3 Page - STMicroelectronics |
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VND9012AJ датащи(HTML) 3 Page - STMicroelectronics |
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3 / 46 page ![]() 1 Block diagram and pin description Figure 1. Block diagram Logic VCC Gate driver Clamp VCC– OUT limitation Current Sense Current Channel 0 control & diagnostic shut- down Undervoltage Internal supply clamp GND D N G – C C V IN0 SEn FaultRST OUT0 CS Channel 1 OUT1 CH 1 IN1 SEL Reverse Battery CH 0 Open-Load in OFF Power limitation Overtemperature Table 1. Pin functions Name Function VCC Battery connection. OUTPUT0,1 Power output. GND Ground connection. Must be reverse battery protected by an external diode / resistor network. INPUT0,1 Voltage controlled input pin with hysteresis, compatible with 3 V and 5 V CMOS outputs. It controls output switch state. CS Multiplexed analog sense output pin; it delivers a current proportional to the selected load current. SEn Active high compatible with 3 V and 5 V CMOS outputs pin; it enables the CS diagnostic pin. SEL Active high compatible with 3 V and 5 V CMOS outputs pin; it addresses the CS multiplexer. FaultRST Active low compatible with 3 V and 5 V CMOS outputs pin; it unlatches the output in case of fault; If kept low, it sets the outputs in auto-restart mode. VND9012AJ Block diagram and pin description DS12727 - Rev 5 page 3/46 |
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