поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

Preview PDF HTML

STMPE1601 датащи(PDF) 24 Page - STMicroelectronics

номер детали STMPE1601
подробное описание детали  16-bit enhanced port expander with keypad and PWM controller Xpander Logic
PDF  58 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STMPE1601 датащи(HTML) 24 Page - STMicroelectronics

Back Button STMPE1601 Datasheet HTML 20Page - STMicroelectronics STMPE1601 Datasheet HTML 21Page - STMicroelectronics STMPE1601 Datasheet HTML 22Page - STMicroelectronics STMPE1601 Datasheet HTML 23Page - STMicroelectronics STMPE1601 Datasheet HTML 24Page - STMicroelectronics STMPE1601 Datasheet HTML 25Page - STMicroelectronics STMPE1601 Datasheet HTML 26Page - STMicroelectronics STMPE1601 Datasheet HTML 27Page - STMicroelectronics STMPE1601 Datasheet HTML 28Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 24 / 58 page
background image
Interrupt system
STMPE1601
24/58
9.1.1
Interrupt latency
When the generation of interrupts by the GPIO as input is enabled, the latency (time taken
from actual transition at GPIO to time of INT pin assertion) is shown in the following table:
INT_CTRL
Interrupt control register
Address:
0x10, 0x11
Buffer:
R, R/W
Reset:
0x00
Description:
The interrupt control register is used to configure the interrupt controller. It has a
global enable interrupt mask bit that controls the interruption to the host.
Table 17.
Interrupt latency
State of operation
Interrupt latency
Hibernation
10 uS max
Sleep
5 uS max
Active
2 uS max
15
14
13
12
11
10
987654
3210
INT_CTRL_msb
INT_CTRL_lsb
Reserved
IC2
IC1
IC0
R
RRRRRRR
RRRRR
RW
RW
RW
000000
000000
0000
[15:3] RESERVED
[2] IC2
[1] IC1: Output Interrupt Type
‘0’ = Level interrupt
‘1’ = Edge interrupt
[0] IC0: Global Interrupt Mask bit
When this bit is written a ‘1’, it will allow interruption to the host. If it is written with a ‘0’, then, it
disables all interruption to the host. Writing to this bit does not affect the INT_EN_MASK value.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com