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LP3875-ADJ датащи(PDF) 4 Page - Texas Instruments

номер детали LP3875-ADJ
подробное описание детали  LP3875-ADJ 1.5-A Fast Ultra-Low-Dropout LDOs
PDF  25 Pages
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производитель  TI2 [Texas Instruments]
домашняя страница  https://www.ti.com
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LP3875-ADJ датащи(HTML) 4 Page - Texas Instruments

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LP3875-ADJ
SNVS247E – SEPTEMBER 2003 – REVISED AUGUST 2016
www.ti.com
Product Folder Links: LP3875-ADJ
Submit Documentation Feedback
Copyright © 2003–2016, Texas Instruments Incorporated
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
If Military/Aerospace specified devices are required, contact the TI Sales Office/Distributors for availability and specifications.
(3)
If used in a dual-supply system where the regulator load is returned to a negative supply, the output must be diode-clamped to ground.
(4)
The output PMOS structure contains a diode between the IN and OUT pins. This diode is normally reverse biased. This diode will get
forward biased if the voltage at the output terminal is forced to be higher than the voltage at the input terminal. This diode can typically
withstand 200 mA of DC current and 1 A of peak current.
(5)
At elevated temperatures, device power dissipation must be derated based on package thermal resistance and heat sink values (if a
heat sink is used). If power dissipation causes the junction temperature to exceed specified limits, the device goes into thermal
shutdown.
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1) (2)
MIN
MAX
UNIT
IN pin to GND pin voltage
−0.3
7.5
V
Shutdown (SD) pin to GND pin voltage
−0.3
7.5
V
OUT pin to GND pin voltage(3),(4)
−0.3
6
V
IOUT
Short-circuit protected
Power dissipation(5)
Internally limited
Storage temperature, Tstg
−65
150
°C
(1)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
6.2 ESD Ratings
VALUE
UNIT
V(ESD)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
±2000
V
(1)
The minimum operating value for VIN is equal to either [VOUT(NOM) + VDROPOUT] or 2.5 V, whichever is greater.
6.3 Recommended Operating Conditions
MIN
MAX
UNIT
VIN supply voltage
(1)
2.5
7
V
Shutdown (SD) voltage
−0.3
7
V
Maximum operating current (DC) IOUT
1.5
A
Junction temperature
–40
125
°C
(1)
For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics.
(2)
Thermal resistance value RθJA is based on the EIA/JEDEC High-K printed circuit board defined by JESD51-7 - High Effective Thermal
Conductivity Test Board for Leaded Surface Mount Packages.
6.4 Thermal Information
THERMAL METRIC(1)
LP3875-ADJ
UNIT
NDC (SOT-223)
KTT (TO-263)
5 PINS
5 PINS
RθJA
(2)
Junction-to-ambient thermal resistance, High K
65.2
40.3
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
47.2
43.4
°C/W
RθJB
Junction-to-board thermal resistance
9.9
23.1
°C/W
ψJT
Junction-to-top characterization parameter
3.4
11.5
°C/W
ψJB
Junction-to-board characterization parameter
9.7
22
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
n/a
1
°C/W



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