DocID022644 Rev 2

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ST7580

Analog front-end (AFE)

33

5.4

Current and voltage control

The power amplifier output current sensing is performed by mirroring a fraction of the output

current and making it flow through a resistor RCL connected between the CL pin and VSS.

The following relationship can be established between V(CL) and I(PA_OUT):

Equation 2 V(CL) vs. I(PA_OUT)

The voltage level V(CL) is compared with the internal threshold CL_TH. When the V(CL)

exceeds the CL_TH level, the V(TX_OUT) voltage is decreased by one TX_GAIN step at

a time until V(CL) goes below the CL_TH threshold.

The current sense circuit is depicted in Figure 7.

Figure 7. PA_OUT current sense circuit

The RCL value to get the desired output current limit I(PA_OUT)LIM can be calculated as

follows:

Equation 3 RCL calculation

Note that I(PA_OUT)LIM is expressed as peak current, so the corresponding RMS current is

calculated according to the transmitted signal waveform. As FSK and PSK modulations

have different crest factor values, different RCL values are required for the two modulations.

The RCL values, to get 1 A RMS output current limit, calculated with typical values for

CL_TH and CL_RATIO parameters, are indicated in Table 8.

Table 8. CL resistor typical values

Parameter

Description

Value

Unit

RCL

Resistor value for I(PA_OUT) max. = 1 A RMS = 1.41 A pk (FSK

mode)

133



Resistor value for I(PA_OUT) max. = 1 A RMS = 2 A pk (PSK mode)

94







RATIO

_

CL

OUT

_

PA

I

R

CL

V

CL 



AM02507v1

PA

CL

VCC

CL

I(CL) = I(PA_OUT)/CL_RATIO

PA

I(PA_OUT)

R



RATIO

_

CL

/

OUT

_

PA

I

TH

_

CL

R

LIM

CL 