DRV8828

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SLVSA11G – OCTOBER 2009 – REVISED NOVEMBER 2015

5 Pin Configuration and Functions

PWP Package

28-Pin HTSSOP With Thermal Pad

Top View

Pin Functions

PIN

EXTERNAL COMPONENTS

I/O(1)

DESCRIPTION

OR CONNECTIONS

NAME

NO.

POWER AND GROUND

GND

14, 28

-

Device ground

Connect to motor supply (8 - 45 V). Both pins

VM

4, 11

-

Bridge power supply

must be connected to same supply.

Bypass to GND with a 0.47-

μF 6.3-V ceramic

V3P3OUT

15

O

3.3-V regulator output

capacitor. Can be used to supply VREF.

CP1

1

I/O

Charge pump flying capacitor

Connect a 0.01-

μF 50-V capacitor between CP1

and CP2.

CP2

2

I/O

Charge pump flying capacitor

Connect a 0.1-

μF 16-V ceramic capacitor and a

VCP

3

I/O

High-side gate drive voltage

1-M

Ω resistor to VM.

CONTROL

ENBL

21

I

Bridge enable

Logic high to enable H-bridge. Internal pulldown.

Logic high sets OUT1 high, OUT2 low. Internal

PHASE

20

I

Bridge phase (direction)

pulldown.

I0

23

I

I1

24

I

Sets winding current as a percentage of full-scale.

I2

25

I

Current set inputs

Internal pulldown.

I3

26

I

I4

27

I

Low = slow decay, open = mixed decay,

DECAY

19

I

Decay mode

high = fast decay

Internal pulldown and pullup.

Active-low reset input initializes internal logic and

nRESET

16

I

Reset input

disables the H-bridge outputs. Internal pulldown.

Reference voltage for winding current set. Both

pins must be connected together on the PCB. A

VREF

12, 13

I

Current set reference input

0.01-µF bypass capacitor to GND is

recommended.

Logic high to enable device, logic low to enter low-

nSLEEP

17

I

Sleep mode input

power sleep mode. Internal pulldown.

NC

22

No connect

Leave this pin unconnected.

(1)

Directions: I = input, O = output, OZ = tri-state output, OD = open-drain output, IO = input/output

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