DLP4710LC 0.47 1080p Digital Micromirror Device

1 Features

• 0.47-Inch (11.93-mm) diagonal micromirror array

– 1920 × 1080 array of aluminum micrometer-

sized mirrors, in an orthogonal layout

– Micromirror pitch: 5.4 μm

– Micromirror tilt (relative to flat surface): ±17°

– Bottom illumination for optimal efficiency and

optical engine size

– Polarization independent aluminum micromirror

surface

• 32-Bit SubLVDS input data bus

• Dedicated DLP3479 display and light controller

• Dedicated DLPA3000 or DLPA3005 PMIC/LED

drivers for reliable operation

2 Applications

• 3D depth capture: 3D camera, 3D reconstruction,

dental scanner

• 3D machine vision: robotics, metrology, automated

in-line inspection (AOI)

• 3D biometrics: facial and finger print recognition

• Integrated Display and 3D depth capture:

projection mapping, smart lighting, AR Projection

• Light exposure: programmable spatial and

temporal light exposure

3 Description

The DLP4710LC digital micromirror device (DMD)

is a digitally controlled micro-opto-electromechanical

system (MOEMS) spatial light modulator (SLM).

When coupled to an appropriate optical system, the

DLP4710LC DMD displays a very crisp and high

quality image or video. The device is a component

of the chipset comprising the DLP4710LC DMD,

DLPC3479

controller

and

DLPA3000/DLPA3005

PMIC/LED drivers. The compact physical size of

the DLP4710LC coupled with the controller and the

PMIC/LED driver provides a complete system solution

that enables small form factor, low power, and high

resolution HD displays.

Device Information

PART NUMBER

PACKAGE(1)

BODY SIZE (NOM)

DLP4710LC

FQL (100)

24.50-mm × 11-mm

(1)

For all available packages, see the orderable addendum at

the end of the data sheet.

DLP DMD

Digital

Micromirror

Device

D_BP(0:7)

LS_RDATA_B

DCLK_BP

D_AP(0:7)

D_AN(0:7)

DCLK_AP

DCLK_AN

DMD_DEN_ARSTZ

LS_WDATA

LS_CLK

LS_RDATA

VDDI

VDD

VSS

(System signal routing omitted for clarity)

D_BP(0:7)

DCLK_BN

DLP

Pico Processor

120 MHz

SDR

Interface

600 MHz

SubLVDS

DDR

Interface

Master

DLP

Pico Processor

120 MHz

SDR

Interface

600 MHz

SubLVDS

DDR

Interface

Slave

DLP Pico Analog Device

VOFFSET

VBIAS

VRESET

0.47 1080p Chipset

DLP4710LC

DLPS178C – MAY 2020 – REVISED JULY 2023

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.