7 Parameter Measurement Information

Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators

having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tt < 6 ns.

For clock inputs, fmax is measured when the input duty cycle is 50%.

The outputs are measured one at a time with one input transition per measurement.

CL

(1)

From Output

Under Test

Test

Point

(1) CL includes probe and test-fixture capacitance.

Figure 7-1. Load Circuit for Push-Pull Outputs

50%

tw

Input

50%

VCC

0 V

Figure 7-2. Voltage Waveforms, Standard CMOS

Inputs Pulse Duration

Clock

Input

50%

VCC

0 V

50%

50%

VCC

0 V

tsu

Data

Input

th

Figure 7-3. Voltage Waveforms, Standard CMOS

Inputs Setup and Hold Times

50%

Input

50%

VCC

0 V

50%

50%

VOH

VOL

tPLH

(1)

tPHL

(1)

VOH

VOL

tPHL

(1)

tPLH

(1)

Output

Output

50%

50%

(1) The greater between tPLH and tPHL is the same as tpd.

Figure 7-4. Voltage Waveforms, Propagation

Delays for Standard CMOS Inputs

VOH

VOL

Output

VCC

0 V

Input

tf

(1)

tr

(1)

90%

10%

90%

10%

tr

(1)

90%

10%

tf

(1)

90%

10%

(1) The greater between tr and tf is the same as tt.

Figure 7-5. Voltage Waveforms, Input and Output

Transition Times for Standard CMOS Inputs

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CD54HC273, CD74HC273

CD54HCT273, CD74HCT273

SCHS174C – FEBRUARY 1998 – REVISED JANUARY 2022

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