LP8552 datasheet(30/49 Pages) TI2

30 / 49 page

LP8552

SNVS693E – SEPTEMBER 2011 – REVISED SEPTEMBER 2014

www.ti.com

Programming sequence (program data permanently from registers to NVM):

1. Turn on the chip by writing BL_CTL bit to 1 and BRT_MODE[1:0] to 10b (05h to address 01h)

2. Write data to EEPROM registers (address A0h…A7h).

3. Write EE_INIT to 1 in address 72h. (04h to address 72h).

4. Write EE_PROG to 1 and EE_INIT to 0 in address 72h. (02h to address 72h).

5. Wait 200 ms.

6. Write EE_PROG to 0 in address 72h. (00h to address 72h).

Read sequence (load data from NVM to registers):

1. Turn on the chip by writing BL_CTL bit to 1 and BRT_MODE[1:0] to 10b (05h to address 01h).

2. Write EE_INIT to 1 in address 72h. (04h to address 72h).

3. Write EE_READ to 1 and EE_INIT to 0 in address 72h. (01h to address 72h).

4. Wait 200 ms.

5. Write EE_READ to 0 in address 72h. (00h to address 72h).

Data written to EEPROM registers is effective immediately even if the EEPROM programming sequence has not

been done. When power is turned off, the device will however lose the data if it is not programmed to the NVM.

During startup device automatically loads the data from NVM to registers.

NOTE

EEPROM NVM can be programmed or read by customer for bench validation.

Programming for production devices should be done in TI production test, where

appropriate checks will be performed to confirm EEPROM validity. Writing to EEPROM

Control register of production devices (for burning or reading EEPROM) is not

recommended. If special EEPROM configuration is required, please contact the TI Sales

Office for availability.

8.6.2 EEPROM Bit Explanations

Table 7. EEPROM Memory Map

ADDR

A0H

eeprom addr 0

CURRENT[7:0]

A1H

eeprom addr 1

BOOST_FREQ[1:0]

EN_PWM_&

TEMP_LIM[1:0]

SLOPE[2:0]

_I_CTRL

A2H

eeprom addr 2

ADAPTIVE_SPEED[1:0]

ADV_SLOP

MODE_25/50

EN_ADAPT

EN_BOOST

BOOST_IMA

I_SLOPE[1]

%_SEL

A3H

eeprom addr 3

UVLO[1:0]

EN_PSPWM

PWM_FREQ[4:0]

A4H

eeprom addr 4

PWM_RESOLUTION[1:0]

EN_I_RES

LED_FAULT_

I_SLOPE[0]

DRV_HEADR[2:0]

THR

A5H

eeprom addr 5

EN_VSYNC

DITHER[1:0]

VBOOST[4:0]

A6H

eeprom addr 6

PLL[12:5]

A7H

eeprom addr 7

PLL[4:0]

EN_F_RES

HYSTERESIS[1:0]

8.6.2.1 EEPROM Address 0

Address A0h

EEPROM ADDRESS 0 REGISTER

CURRENT[7:0]

Name

Bit

Access

Description

Submit Documentation Feedback

Product Folder Links: LP8552

LP8552 датащи(PDF) 30 Page - Texas Instruments

LP8552 датащи(HTML) 30 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49

датащи скачать

ссылки URL