PTH12020W TYPICAL CHARACTERISTICS (VI = 12 V)(1)(2)

50

60

70

80

90

100

0

3

6

9

12

15

18

IO − Load Current − A

VO = 5 V

VO = 3.3 V

VO = 2.5 V

VO = 1.8 V

VO = 1.5 V

VO = 1.2 V

VO = 2 V

(See Note A)

50

60

70

80

90

100

0

3

6

9

12

15

18

VO = 5 V

VO = 3.3 V

VO = 2.5 V

VO = 2 V

VO = 1.8 V

VO = 1.5 V

VO = 1.2 V

IO − Load Current − A

(See Note A)

0

1

2

3

4

5

6

0

5

10

15

IO − Load Current − A

VO = 5 V

VO = 3.3 V

VO = 2.5 V

VO = 1.8 V

VO = 1.5 V

VO = 1.2 V

VO = 2 V

15

(See Note A)

20

30

40

50

60

70

80

90

0

3

6

9

12

15

18

400 LFM

200 LFM

100 LFM

Nat Conv

VO = 2.5 V

IO − Load Current − A

(See Note B)

20

30

40

50

60

70

80

90

0

3

6

9

9

9

12

15

18

400 LFM

200 LFM

100 LFM

Nat Conv

VO = 5 V

IO − Load Current − A

(See Note B)

20

30

40

50

60

70

80

90

0

3

6

400 LFM

200 LFM

100 LFM

Nat Conv

VO = 1.8 V

IO − Load Current − A

9

12

15

18

(See Note B)

PTH12020W/L

www.ti.com ............................................................................................................................................................. SLTS208I – MAY 2003 – REVISED MARCH 2009

EFFICIENCY

OUTPUT RIPPLE

POWER DISSIPATION

vs

vs

vs

LOAD CURRENT

LOAD CURRENT

LOAD CURRENT

Figure 1.

Figure 2.

Figure 3.

TEMPERATURE DERATING

TEMPERATURE DERATING

TEMPERATURE DERATING

vs

vs

vs

OUTPUT CURRENT

OUTPUT CURRENT

OUTPUT CURRENT

Figure 4.

Figure 5.

Figure 6.

(1)

Note A: The electrical characteristic data has been developed from actual products tested at 25°C. This data is considered typical for the

converter. Applies to Figure 1, Figure 2, and Figure 3.

(2)

Note B: The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's

maximum operating temperatures. Derating limits apply to modules soldered directly to a 4 inch × 4 inch double-sided PCB with 1oz.

copper. For surface mount products (AS and AZ suffix), multiple vias (plated through holes) are required to add thermal paths around

the power pins. Please refer to the mechanical specification for more information. Applies to Figure 4, Figure 5 and Figure 6.

Copyright © 2003–2009, Texas Instruments Incorporated

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