ADC14C080

SNAS375C – SEPTEMBER 2006 – REVISED APRIL 2013

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ADC14C080 Converter Electrical Characteristics

Unless otherwise specified, the following specifications apply: AGND = DRGND = 0V, VA = +3.0V, VDR = +2.5V, Internal VREF

= +1.2V, fCLK = 80 MHz, 50% Duty Cycle, DCS Disabled, VCM = VCMO, CL = 5 pF/pin. Typical values are for TA = 25°C.

Boldface limits apply for TMIN ≤ TA ≤ TMAX. All other limits apply for TA = 25°C

(1) (2)

Units

Parameter

Test Conditions

Typical(3)

Limits

(Limits)

STATIC CONVERTER CHARACTERISTICS

Resolution with No Missing Codes

14

Bits (min)

3.5

LSB (max)

INL

Integral Non Linearity

±1.5

-3.5

LSB (min)

1

LSB (max)

DNL

Differential Non Linearity

±0.5

-0.75

LSB (min)

PGE

Positive Gain Error

0.3

±1.25

%FS (max)

NGE

Negative Gain Error

0.25

±1.25

%FS (max)

TC PGE

Positive Gain Error Tempco

−40°C ≤ TA ≤ +85°C

-7

ppm/°C

TC NGE

Negative Gain Error Tempco

−40°C ≤ TA ≤ +85°C

-6

ppm/°C

VOFF

Offset Error

0.065

±0.55

%FS (max)

TC VOFF

Offset Error Tempco

−40°C ≤ TA ≤ +85°C

7.5

ppm/°C

Under Range Output Code

0

0

Over Range Output Code

16383

16383

REFERENCE AND ANALOG INPUT CHARACTERISTICS

1.40

V (min)

VCMO

Common Mode Output Voltage

1.5

1.56

V (max)

1.4

V (min)

VCM

Analog Input Common Mode Voltage

1.5

1.6

V (max)

(CLK LOW)

8.5

pF

VIN Input Capacitance (each pin to

VIN = 1.5 Vdc ± 0.5

CIN

GND)(4)

V

(CLK HIGH)

3.5

pF

VREF

Internal Reference Voltage

1.20

V

TC VREF

Internal Reference Voltage Tempco

−40°C ≤ TA ≤ +85°C

18

ppm/°C

1.89

V (min)

VRP

Internal Reference top

See(5)

1.98

2.06

V (max)

0.89

V (min)

VRN

Internal Reference bottom

See(5)

0.98

1.06

V (max)

1.176

V (min)

Ext VREF

External Reference Voltage

See(5)

1.20

1.224

V (max)

(1)

The inputs are protected as shown below. Input voltage magnitudes above VA or below GND will not damage this device, provided

current is limited per Note 4 of the Absolute Maximum Ratings Table. However, errors in the A/D conversion can occur if the input goes

above 2.6V or below GND as described in the Operating Ratings section. See Figure 2.

(2)

With a full scale differential input of 2VP-P , the 14-bit LSB is 122.1 µV.

(3)

Typical figures are at TA = 25°C and represent most likely parametric norms at the time of product characterization. The typical

specifications are not ensured.

(4)

The input capacitance is the sum of the package/pin capacitance and the sample and hold circuit capacitance.

(5)

This parameter is ensured by design and/or characterization and is not tested in production.

6

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