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TMP105 датащи(PDF) 12 Page - Texas Instruments

номер детали TMP105
подробное описание детали  Digital Temperature Sensor with Two-Wire Interface
PDF  21 Pages
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производитель  TI2 [Texas Instruments]
домашняя страница  https://www.ti.com
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TMP105 датащи(HTML) 12 Page - Texas Instruments

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background image
SCL
SDA
t
(LOW)
t
R
t
F
t
(HDSTA)
t
(HDSTA)
t
(HDDAT)
t
(BUF)
t
(SUDAT)
t
(HIGH)
t
(SUSTA)
t
(SUSTO)
P
S
S
P
Frame1Two-WireSlaveAddressByte
Frame2PointerRegisterByte
Frame4DataByte2
1
StartBy
Master
ACKBy
TMP105
ACKBy
TMP105
ACKBy
TMP105
StopBy
Master
1
9
1
1
D7
D6
D5
D4
D3
D2
D1
D0
9
Frame3DataByte1
ACKBy
TMP105
1
D7
SDA
(Continued)
SCL
(Continued)
D6
D5
D4
D3
D2
D1
D0
9
9
SDA
SCL
0
0
1
0
0
A0
R/W
0
0
0
0
0
0
P1
P0
¼
¼
TMP105
SLLS648D
– FEBRUARY 2005 – REVISED SEPTEMBER 2011
www.ti.com
Table 12. Timing Diagram Definitions for the TMP105
FAST MODE
PARAMETER
UNITS
MIN
MAX
SCL Operating Frequency
f(SCL)
1
400
kHz
Bus Free Time Between STOP and START Condition
t(BUF)
600
ns
Hold time after repeated START condition.
t(HDSTA)
100
ns
After this period, the first clock is generated.
Repeated START Condition Setup Time
t(SUSTA)
100
ns
STOP Condition Setup Time
t(SUSTO)
100
ns
Data Hold Time
t(HDDAT)
0
ns
Data Setup Time
t(SUDAT)
100
ns
SCL Clock LOW Period
t(LOW)
1300
ns
SCL Clock HIGH Period
t(HIGH)
600
ns
Clock/Data Fall Time
tF
300
ns
Clock/Data Rise Time
300
ns
tR
1000
ns
for SCLK
≤ 100kHz
TWO-WIRE TIMING DIAGRAMS
Figure 4. Two-Wire Timing Diagram
Figure 5. Two-Wire Timing Diagram for TMP105 Write Word Format
12
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Copyright
© 2005–2011, Texas Instruments Incorporated
Product Folder Link(s): TMP105



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