TLC2933A

HIGH PERFORMANCE PHASE LOCKED LOOP

SLES149 − OCTOBER 2005

2

TI.COM

functional block diagram

4

5

6

9

12

13

10

2

3

FIN−A

FIN−B

PFD INHIBIT

VCO IN

BIAS

VCO INHIBIT

SELECT

VCO OUT

PFD OUT

Phase

Frequency

Detector

Voltage

Controlled

Oscillator

Terminal Functions

TERMINAL

I/O

DESCRIPTION

NAME

NO.

I/O

DESCRIPTION

LOGIC VDD

1

Power supply for the internal logic. This power supply should be separated from VCO VDD to reduce

cross-coupling between supplies.

SELECT

2

I

VCO output frequency select. When SELECT is high, the VCO output frequency is

×1/2 and when

low. The output frequency is

×1.

VCO OUT

3

O

VCO output. When the VCO INHIBIT is high, VCO output is low.

FIN−A

4

I

Input reference frequency f(REF IN) is applied to FIN−A.

FIN−B

5

I

Input for VCO external counter output frequency f(FIN−B). FIN−B is nominally provided from the

external counter.

PFD OUT

6

O

PFD output. When the PFD INHIBIT is high, PFD output is in the high-impedance state.

LOGIC GND

7

GND for the internal logic.

TEST

8

Connect to GND.

PFD INHIBIT

9

I

PFD inhibit control. When PFD INHIBIT is high, PFD output is in the high-impedance state.

VCO INHIBIT

10

I

VCO inhibit control. When VCO INHIBIT is high, VCO output is low.

VCO GND

11

GND for VCO.

VCO IN

12

I

VCO control voltage input. Nominally the external loop filter output connects to VCO IN to control

VCO oscillation frequency.

RBIAS

13

I

Bias supply. An external resistor (RBIAS) between VCO VDD and RBIAS supplies bias for adjusting the

oscillation frequency range.

VCO VDD

14

Power supply for VCO. This power supply should be separated from LOGIC VDD to reduce

cross-coupling between supplies.