EN

A2

IN

B2

EN

A2

IN

B2

A1

GND

B1

OUT

A1

GND

B1

OUT

Top View

Bottom View

3

LP3991

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SNVS296J – DECEMBER 2006 – REVISED JUNE 2016

Product Folder Links: LP3991

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5 Pin Configuration and Functions

YZR Package

4-Pin Thin DSBGA, Large Bump

Pin Functions

PIN

I/O

DESCRIPTION

NUMBER

NAME

A1

GND

—

Common ground. Connect to pad.

A2

EN

I

Enable Input; enables the regulator when

≥ 0.95 V.

Disables the regulator when

≤ 0.4 V.

Enable input has an internal 1.2-M

Ω pulldown resistor to GND.

B1

OUT

O

Voltage output. A low-ESR ceramic capacitor must be connected from this pin to GND (see

Application and Implementation). Connect this output to the load circuit.

B2

IN

I

Voltage supply input. A 1-µF capacitor must be connected from this pin to GND.