Preliminary Technical Data

AD5066

Rev. PrB | Page 17 of 20

Table 13. Clear Code Register

Clear Code Register

DB1

DB0

CR1

CR0

Clears to Code

0

0

0x0000

0

1

0x8000

1

0

0xFFFF

1

1

No operation

Table 14. 32-Bit Input Shift Register Contents for Clear Code Function

MSB

LSB

DB31 to DB28

DB27

DB26

DB25

DB24

DB23

DB22

DB21

DB20

DB2 to DB19

DB1

DB0

X

0

1

0

1

X

X

X

X

X

1/0

1/0

Don’t cares

Command bits (C3 to C0)

Address bits (A3 to A0)

Don’t cares

Clear code register

(CR1 to CR0)

Table 15. LDAC Overwrite Definition

Load DAC Register

LDAC Bits (DB3 to DB0)

LDAC Pin

LDAC Operation

0

1/0

Determined by LDAC pin

1

X—don’t care

DAC channels update, overrides the LDAC pin. DAC channels see LDAC as 0.

Table 16. 32-Bit Input Shift Register Contents for LDAC Overwrite Function

MSB

LSB

DB31

to

DB28

DB27

DB26

DB25

DB24

DB23

DB22

DB21

DB20

DB4

to

DB19

DB3

DB2

DB1

DB0

X

0

1

1

0

X

X

X

X

X

DAC D

DAC C

DAC B

DAC A

Don’t

cares

Command bits (C3 to C0)

Address bits (A3 to A0)—

don’t cares

Don’t

cares

Setting LDAC bit to 1 override LDAC pin