5

LM3535

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SNVS598B – AUGUST 2010 – REVISED MARCH 2018

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(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

6.4 Thermal Information

THERMAL METRIC(1)

LM3535

UNIT

YFQ (WCSP)

20 PINS

RθJA

Junction-to-ambient thermal resistance

70.5

°C/W

RθJC(top)

Junction-to-case (top) thermal resistance

0.6

°C/W

RθJB

Junction-to-board thermal resistance

16.7

°C/W

ψJT

Junction-to-top characterization parameter

0.4

°C/W

ψJB

Junction-to-board characterization parameter

16.9

°C/W

RθJC(bot)

Junction-to-case (bottom) thermal resistance

N/A

°C/W

(1)

All voltages are with respect to the potential at the GND pins.

(2)

Minimum and maximum limits are ensured by design, test, or statistical analysis. Typical numbers are not ensured, but do represent the

most likely norm.

(3)

CIN, CVOUT, C1, and C2 : Low-ESR surface-mount ceramic capacitors (MLCCs) used in setting electrical characteristics

(4)

For the two groups of current sinks on a part (GroupA and GroupB), the following are determined: the maximum sink current in the

group (MAX), the minimum sink current in the group (MIN), and the average sink current of the group (AVG). For each group, two

matching numbers are calculated: (MAX-AVG)/AVG and (AVG-MIN)/AVG. The largest number of the two (worst case) is considered the

matching figure for the Group. The matching figure for a given part is considered to be the highest matching figure of the two Groups.

The typical specification provided is the most likely norm of the matching figure for all parts.

(5)

For each Dxxpin, headroom voltage is the voltage across the internal current sink connected to that pin. For Group A, B, and C current

sinks, VHRx = VOUT – VLED. If headroom voltage requirement is not met, LED current regulation will be compromised.

6.5 Electrical Characteristics

Typical limits are TA = 25°C, and minimum and maximum limits in apply over the full operating temperature range (–30°C to

+85°C). Unless otherwise specified: VIN = 3.6 V; VHWEN = VIN; VPWM = 0 V; VDxA = VDxB = VDxC = 0.4 V; GroupA = GroupB =

GroupC = full-scale current; ENxA, ENxB, ENxC bits = 1; 53A, 62A bits = 0; C1 = C2 = CIN = COUT= 1 µF.

(1) (2) (3)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

IDxx

Output current regulation

GroupA

2.7 V

≤ VIN ≤ 5.5 V

EN1A to EN4A = 1, 53A = 62A = 0, EN53

= EN62 = ENxB = ENxC = 0

4 LEDs in GroupA

23.6

(–5.6%)

25

26.3

(5.2%)

mA

(%)

2.7 V

≤ VIN ≤ 5.5 V

EN1A to EN4A = EN53 = EN62 = 1, 53A =

62A = 1, ENxB = ENxC = 0

6 LEDs in GroupA

23.2

(–7.2%)

25

26.3

5.2%

mA

(%)

Output current regulation

GroupB

2.7 V

≤ VIN ≤ 5.5 V

EN1B = EN53 = EN62 = 1, 53A = 62A = 0,

ENxA = ENC = 0

3 LEDs in GroupB

23.3

(–6.8%)

25

(+4%)

mA

(%)

Output current regulation

IDC

2.7 V

≤ VIN ≤ 5.5 V

ENC = 1, ENxA = ENxB = 0

23.8

(–4.8%)

25

26.8

(7.2%)

mA

(%)

Output current regulation

GroupA, GroupB, and GroupC

enabled

3.2 V

≤ VIN ≤ 5.5V

VLED = 3.6 V

25

DxA

mA

25

DxB

25

DxC

IDxx-

MATCH

LED current matching(4)

2.7 V

≤ VIN ≤ 5.5 V

GroupA (4

LEDs)

0.25%

2.4%

GroupA (6

LEDs)

0.55%

2.78

GroupB (3

LEDs)

0.25%

2.41%

VDxTH

VDxx 1x to 3/2x gain transition

threshold

VDxA and/or VDxB falling

130

mV

VHR

Current sink headroom voltage

requirement(5)

IDxx = 95% ×IDxx (nominal)

(IDxx (nominal) = 25 mA)

100

mV