SMBP2501BPB datasheet(2/107 Pages) SONIX

2 / 107 page

SN8P2501B

8-Bit Micro-Controller

SONiX TECHNOLOGY CO., LTD

Page 2

Version 2.1

AMENDMENT HISTORY

Version

Date

Description

VER 0.1

Jun 2005

First issue

Aug 2005

1.Modify P85 Internal Hihg RC.

2.ADD Brown-Out reset.

VER 0.2

Nov 2005

Modify Topr value.

ADD IHRC curve.

VER 0.3

Dec. 2005

Modify Brown-Out Reset description

Remove power consumption(Pc)

Add T0 RTC description

Add Fcpu limitation by Noise filter enable.

Modify ELECTRICAL CHARACTERISTIC.

VER 0.4

Aug. 2006

The Fcpu of IHRC_16M and IHRC_RTC mode is limited to Fosc/4~Fosc/16.

Modify IHRC frequency curve in characteristic graphs section.

VER 0.5

Oct. 2006

Add Marking Definition.

Modify ELECTRICAL CHARACTERISTIC.

VER 0.6

Jan.2006

Modify RST/P1.1/VPP PIN DISCRIPTION.

Modify ELECTRICAL CHARACTERISTIC

VER 1.0

May. 2011

Modify “Chapter 4.3 OSCM REGISTER” STPHX bit description : external high-speed

oscillator control bit=> High-speed oscillator control bit.

Modify “Chapter 9 INSTRUCTION TABLE”: NOP/PUSH/POP/RETI instructions.

Modify “Chapter 2.1.2 CODE OPTION TABLE” code option High_Clk = IHRC_RTC

description.

Modify “Chapter 2.3.2 STACK REGISTERS” description : 9-bit >> 10-bit data

memory.

Update

“Table of Content” and the others.

VER 1.1

Sep. 2011

Modify operating temperature 0~70℃ >> -10~70℃.

VER 1.2

Sep. 2011

Add T0 timer limited:

T0 timer have T0IRQ clock loss issue in High_Clk code option = “IHRC_RTC” and

“T0TB = 1” mode. So user have to use main routing polling T0C state by the way,

recommend refer to “T0 TIMER WITH RTC FUNCTION OPERATION SEQUENCE”

chapter

“T0 TIMER WITH RTC FUNCTION OPERATION SEQUENCE” chapter

description: main routing structure polling T0C value overflow to update RTC time.

Main routing interval time as one cycle is not more than 200ms.

Add RTC limited description at

“INTERRUPT “chapter.

VER 1.3

Sep. 2011

Modify Hong Kong Office address.

VER 1.4

Oct. 2011

Modify

“WATCHDOG TIMER” chapter example program fail.

B0BSET FWDRST >> MOV A, #5AH

B0MOV WDTR,A

VER 1.5

Oct. 2011

Modify “TC0 CLOCK FREQUENCY OUTPUT (BUZZER)” chapter description :

TC0 Setup TC0OUT output from TC0 to TC0OUT (P5.4). The external

high-speed clock is 4MHz.. The TC0OUT frequency is 0.5KHz. Because the

TC0OUT signal is divided by 2, set the TC0 clock to 1KHz. The TC0 clock source

is from external oscillator clock. T0C rate is Fcpu/4. The TC0RATE2~TC0RATE1

= 110. TC0C = TC0R = 131.

TC0 Setup TC0OUT output from TC0 to TC0OUT (P5.4). The external

high-speed clock is 4MHz.. Fcpu = Fosc/4 = 1MIPS. The TC0OUT frequency is

1KHz. Because the TC0OUT signal is divided by 2, set the TC0 clock to 2KHz.

The TC0 clock source is from external oscillator clock. TC0 rate is Fcpu/4. The

TC0RATE2~TC0RATE1 = 110. TC0C = TC0R = 131.

VER 1.6

Aug. 2012

Modify

“ELECTRICAL CHARACTERICS” chapter operating temperature from -10~70℃

to -20~85℃ and others.

VER 1.7

May. 2014

Delete

“T0 TIMER WITH RTC FUNCTION OPERATION SEQUENCE” chapter

VER 1.8

Aug. 2014

1. Modify

“ELECTRICAL CHARACTERISTIC” chapter :

I/O output source current (max.) = 20mA.

I/O output source current (min.) = 20mA.

2. Add PIN ASSIGNMENT : SN8P2501BA (MSOP 10pin)

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