ISO7421-EP

SLLSEN3 – DECEMBER 2015

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8 Detailed Description

8.1 Overview

The ISO7421 digital isolator has two isolated channels. The ISO7421 provides galvanic isolation up to

2500VRMS for one minute per UL. The isolator in Figure 9 is based on a capacitive isolation barrier technique.

The I/O channel of the device consists of two internal data channels, a high-frequency channel (HF) with a

bandwidth from 100 kbps up to 1 Mbps, and a low-frequency channel (LF) covering the range from 100 kbps

down to DC. In principle, a single- ended input signal entering the HF-channel is split into a differential signal via

the inverter gate at the input. The following capacitor-resistor networks differentiate the signal into transients,

which then are converted into differential pulses by two comparators. The comparator outputs drive a NOR-gate

flip-flop whose output feeds an output multiplexer. A decision logic (DCL) at the driving output of the flip-flop

measures the durations between signal transients. If the duration between two consecutive transients exceeds a

certain time limit, (as in the case of a low-frequency signal), the DCL forces the output-multiplexer to switch from

the high- to the low-frequency channel.

Because low-frequency input signals require the internal capacitors to assume prohibitively large values, these

signals are pulse-width modulated (PWM) with the carrier frequency of an internal oscillator, thus creating a

sufficiently high frequency signal, capable of passing the capacitive barrier. As the input is modulated, a low-pass

filter (LPF) is needed to remove the high-frequency carrier from the actual data before passing it on to the output

multiplexer.

8.2 Functional Block Diagram

Figure 9. Conceptual Block Diagram of a Digital Capacitive Isolator

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